maxim,max11117 (on spi bus)

Vendor: Maxim Integrated Products

Description

Maxim Integrated 1 channel 10 bit 3 Msps SPI ADC

Properties

Top level properties

These property descriptions apply to “maxim,max11117” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

#io-channel-cells

int

This property is required.

Constant value: 1

supply-gpios

phandle-array

 
GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

 
Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

spi-max-frequency

int

 
Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

 
Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

 
Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

 
SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

 
SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

 
In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

Child node properties

Name

Type

Details

reg

array

 
Channel identifier.

This property is required.

See Important properties for more information.

zephyr,gain

string

 
Gain selection:
- ADC_GAIN_1_6: x 1/6
- ADC_GAIN_1_5: x 1/5
- ADC_GAIN_1_4: x 1/4
- ADC_GAIN_1_3: x 1/3
- ADC_GAIN_2_5: x 2/5
- ADC_GAIN_1_2: x 1/2
- ADC_GAIN_2_3: x 2/3
- ADC_GAIN_4_5: x 4/5
- ADC_GAIN_1:   x 1
- ADC_GAIN_2:   x 2
- ADC_GAIN_3:   x 3
- ADC_GAIN_4:   x 4
- ADC_GAIN_6:   x 6
- ADC_GAIN_8:   x 8
- ADC_GAIN_12:  x 12
- ADC_GAIN_16:  x 16
- ADC_GAIN_24:  x 24
- ADC_GAIN_32:  x 32
- ADC_GAIN_64:  x 64
- ADC_GAIN_128: x 128

This property is required.

Legal values: 'ADC_GAIN_1_6', 'ADC_GAIN_1_5', 'ADC_GAIN_1_4', 'ADC_GAIN_1_3', 'ADC_GAIN_2_5', 'ADC_GAIN_1_2', 'ADC_GAIN_2_3', 'ADC_GAIN_4_5', 'ADC_GAIN_1', 'ADC_GAIN_2', 'ADC_GAIN_3', 'ADC_GAIN_4', 'ADC_GAIN_6', 'ADC_GAIN_8', 'ADC_GAIN_12', 'ADC_GAIN_16', 'ADC_GAIN_24', 'ADC_GAIN_32', 'ADC_GAIN_64', 'ADC_GAIN_128'

zephyr,reference

string

 
Reference selection:
- ADC_REF_VDD_1:     VDD
- ADC_REF_VDD_1_2:   VDD/2
- ADC_REF_VDD_1_3:   VDD/3
- ADC_REF_VDD_1_4:   VDD/4
- ADC_REF_INTERNAL:  Internal
- ADC_REF_EXTERNAL0: External, input 0
- ADC_REF_EXTERNAL1: External, input 1

This property is required.

Legal values: 'ADC_REF_VDD_1', 'ADC_REF_VDD_1_2', 'ADC_REF_VDD_1_3', 'ADC_REF_VDD_1_4', 'ADC_REF_INTERNAL', 'ADC_REF_EXTERNAL0', 'ADC_REF_EXTERNAL1'

zephyr,vref-mv

int

 
This property can be used to specify the voltage (in millivolts)
of the reference selected for this channel, so that applications
can get that value if needed for some calculations.
For the internal reference, the voltage can be usually obtained with
a dedicated ADC API call, so there is no need to use this property
in that case, but for other references this property can be useful.

zephyr,acquisition-time

int

 
Acquisition time.
Use the ADC_ACQ_TIME macro to compose the value for this property
or pass ADC_ACQ_TIME_DEFAULT to use the default setting for a given
hardware (e.g. when the hardware does not allow to configure the
acquisition time).

This property is required.

zephyr,differential

boolean

 
When set, selects differential input mode for the channel. Otherwise,
single-ended mode is used unless the zephyr,input-negative property is
specified, in which case the differential mode is selected implicitly.

zephyr,input-positive

int

 
Positive ADC input. Used only for drivers that select
the ADC_CONFIGURABLE_INPUTS Kconfig option.

zephyr,input-negative

int

 
Negative ADC input. Used only for drivers that select
the ADC_CONFIGURABLE_INPUTS Kconfig option.
When specified, implies the differential input mode for the channel.

zephyr,resolution

int

 
ADC resolution to be used for the channel.

zephyr,oversampling

int

 
Oversampling setting to be used for the channel.
When specified, each sample is averaged from 2^N conversion results
(where N is the provided value).

zephyr,current-source-pin

uint8-array

 
Output pin selection for the current sources. The actual
interpretation depends on the driver. This is used only for drivers
which select the ADC_CONFIGURABLE_EXCITATION_CURRENT_SOURCE_PIN
Kconfig option.

zephyr,vbias-pins

int

 
Output pin selection for the bias voltage. The actual interpretation
depends on the driver. This is used only for drivers which select
the ADC_CONFIGURABLE_VBIAS_PIN Kconfig option.

Specifier cell names

  • io-channel cells: input