Memory requirement defines

Macros
#define	SDC_MEM_PER_CENTRAL_LINK(tx_size, rx_size, tx_count, rx_count)
	Maximum memory required per central link.
#define	SDC_MEM_PER_PERIPHERAL_LINK(tx_size, rx_size, tx_count, rx_count)
	Maximum memory required per peripheral link.
#define	SDC_MEM_CENTRAL_LINKS_SHARED   17
#define	SDC_MEM_PERIPHERAL_LINKS_SHARED   17
#define	SDC_MEM_LE_POWER_CONTROL(num_links)   ((num_links) > 0 ? (13 + (num_links) * 115) : 0)
	Maximum memory required when supporting LE Power Control.
#define	SDC_MEM_SUBRATING(num_links)   (11 + (num_links) * 19)
	Maximum memory required when supporting subrating.
#define	SDC_MEM_SYNC_TRANSFER(num_links)   ((num_links) > 0 ? (13 + (num_links) * 139) : 0)
	Maximum memory required when supporting periodic advertising sync transfer.
#define	SDC_MEM_QOS_CHANNEL_SURVEY   (40)
#define	SDC_MEM_SCAN(buffer_count)   (345 + (buffer_count) * 98)
#define	SDC_MEM_SCAN_EXT(buffer_count)   (345 + (buffer_count) * 320)
#define	SDC_MEM_INITIATOR   (320)
#define	SDC_MEM_FAL(max_num_entries)   ((max_num_entries) > 0 ? (4 + (max_num_entries) * 8) : 0)
#define	SDC_MEM_PER_ADV_SET(max_adv_data)
	Maximum required memory for a given advertising buffer size.
#define	SDC_MEM_PER_PERIODIC_ADV_SET(max_adv_data)
	Additional memory required for periodic advertising.
#define	SDC_MEM_PER_PERIODIC_SYNC(buffer_count)   (218 + (buffer_count) * 279)
#define	SDC_MEM_PER_PERIODIC_SYNC_RSP(tx_buffer_count, rx_buffer_count)    (639 + (tx_buffer_count - 1) * 254 + (rx_buffer_count) * 278)
#define	SDC_MEM_PERIODIC_ADV_LIST(list_size)   ((list_size) * 8)
#define	SDC_MEM_PER_PERIODIC_ADV_RSP_SET(max_adv_data, tx_buffer_count, rx_buffer_count, max_tx_data_size, failure_reporting_enabled)
#define	SDC_MEM_PER_CIG(count)   ((count) > 0 ? (13 + (count) * 123) : 0)
	Maximum memory required per CIG.
#define	SDC_MEM_PER_CIS(count)   ((count) > 0 ? (13 + (count) * 548) : 0)
	Maximum memory required per CIS. Buffer and CIG memory comes in addition.
#define	SDC_MEM_PER_BIG(count)   ((count) > 0 ? (13 + (count) * 284) : 0)
	Maximum memory required per BIG.
#define	SDC_MEM_PER_BIS(count)   ((count) > 0 ? (13 + (count) * 268) : 0)
	Maximum memory required per BIS. Buffer and BIG memory comes in addition.
#define	SDC_MEM_ISO_RX_PDU_POOL_PER_STREAM_SIZE(rx_pdu_buffer_per_stream_count, cis_count, bis_sink_count)    (__MEM_PER_ISO_PDU_POOL(rx_pdu_buffer_per_stream_count) * ((cis_count) + (bis_sink_count)))
	Maximum memory required for the ISO RX PDU pool per stream.
#define	SDC_MEM_ISO_RX_SDU_POOL_SIZE(count, size)   ((count) > 0 ? (8 + (count) * ((size) + 13)) : 0)
	Maximum memory required for the ISO RX path SDUs.
#define	SDC_MEM_ISO_TX_PDU_POOL_SIZE(tx_pdu_buffer_per_stream_count, cis_count, bis_source_count)
	Maximum memory required for the ISO TX PDU pool.
#define	SDC_MEM_ISO_TX_SDU_POOL_SIZE(count, size)   ((count) > 0 ? (12 + (count) * ((size) + 49)) : 0)
	Maximum memory required for the ISO TX path SDUs.
#define	SDC_MEM_CS(count)   ((count) > 0 ? (13 + (count)*7371) : 0)
	Maximum additional memory required to support Channel Sounding.
#define	SDC_MEM_CS_SETUP_PHASE_LINKS(count)   ((count) > 0 ? (11 + (count)*315) : 0)
	Maximum additional memory required to support Channel Sounding setup phase procedures.

Detailed Description

The SoftDevice Controller memory requirement defines may be used to determine the dynamic memory usage at compile time. The defines specify an upper limit, therefore the actual memory required may be less.

Note

The values of the memory requirement defines may change between minor releases.