Zephyr API Documentation
3.6.99
A Scalable Open Source RTOS
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exception.h
Go to the documentation of this file.
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/*
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* Copyright (c) 2016 Jean-Paul Etienne <
[email protected]
>
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* Copyright (c) 2018 Foundries.io Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
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#define ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
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#ifndef _ASMLANGUAGE
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#include <
zephyr/types.h
>
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#include <
zephyr/toolchain.h
>
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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#include <soc_context.h>
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#endif
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#ifdef CONFIG_RISCV_SOC_HAS_ISR_STACKING
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#include <soc_isr_stacking.h>
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#endif
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/*
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* The name of the structure which contains soc-specific state, if
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* any, as well as the soc_esf_t typedef below, are part of the RISC-V
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* arch API.
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*
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* The contents of the struct are provided by a SOC-specific
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* definition in soc_context.h.
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*/
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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struct
soc_esf {
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SOC_ESF_MEMBERS;
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};
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#endif
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#if defined(CONFIG_RISCV_SOC_HAS_ISR_STACKING)
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SOC_ISR_STACKING_ESF_DECLARE;
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#else
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struct
__esf {
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unsigned
long
ra;
/* return address */
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unsigned
long
t0;
/* Caller-saved temporary register */
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unsigned
long
t1;
/* Caller-saved temporary register */
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unsigned
long
t2;
/* Caller-saved temporary register */
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#if !defined(CONFIG_RISCV_ISA_RV32E)
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unsigned
long
t3;
/* Caller-saved temporary register */
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unsigned
long
t4;
/* Caller-saved temporary register */
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unsigned
long
t5;
/* Caller-saved temporary register */
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unsigned
long
t6;
/* Caller-saved temporary register */
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#endif
/* !CONFIG_RISCV_ISA_RV32E */
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unsigned
long
a0;
/* function argument/return value */
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unsigned
long
a1;
/* function argument */
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unsigned
long
a2;
/* function argument */
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unsigned
long
a3;
/* function argument */
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unsigned
long
a4;
/* function argument */
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unsigned
long
a5;
/* function argument */
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#if !defined(CONFIG_RISCV_ISA_RV32E)
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unsigned
long
a6;
/* function argument */
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unsigned
long
a7;
/* function argument */
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#endif
/* !CONFIG_RISCV_ISA_RV32E */
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unsigned
long
mepc;
/* machine exception program counter */
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unsigned
long
mstatus;
/* machine status register */
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unsigned
long
s0;
/* callee-saved s0 */
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#ifdef CONFIG_USERSPACE
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unsigned
long
sp;
/* preserved (user or kernel) stack pointer */
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#endif
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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struct
soc_esf soc_context;
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#endif
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} __aligned(16);
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#endif
/* CONFIG_RISCV_SOC_HAS_ISR_STACKING */
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typedef
struct
__esf z_arch_esf_t;
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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typedef
struct
soc_esf soc_esf_t;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _ASMLANGUAGE */
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#endif
/* ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_ */
types.h
toolchain.h
Macros to abstract toolchain specific capabilities.
zephyr
arch
riscv
exception.h
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