Receiver Configuration

Macros
#define	ST25R3911B_REG_RX_CONF1_Z12K   BIT(0)
#define	ST25R3911B_REG_RX_CONF1_H80   BIT(1)
#define	ST25R3911B_REG_RX_CONF1_H200   BIT(2)
#define	ST25R3911B_REG_RX_CONF1_LP0   BIT(3)
#define	ST25R3911B_REG_RX_CONF1_LP1   BIT(4)
#define	ST25R3911B_REG_RX_CONF1_LP2   BIT(5)
#define	ST25R3911B_REG_RX_CONF1_AMD_SEL   BIT(6)
#define	ST25R3911B_REG_RX_CONF1_CH_SEL   BIT(7)

Detailed Description

Register 1 bits