7#ifndef ZEPHYR_INCLUDE_SYS_BARRIER_H_
8#define ZEPHYR_INCLUDE_SYS_BARRIER_H_
12#if defined(CONFIG_BARRIER_OPERATIONS_ARCH)
13# if defined(CONFIG_ARM)
15# elif defined(CONFIG_ARM64)
18#elif defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
42#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
43 z_barrier_dmem_fence_full();
61#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
62 z_barrier_dsync_fence_full();
80#if defined(CONFIG_BARRIER_OPERATIONS_ARCH) || defined(CONFIG_BARRIER_OPERATIONS_BUILTIN)
81 z_barrier_isync_fence_full();
#define ALWAYS_INLINE
Definition: common.h:129
static ALWAYS_INLINE void barrier_isync_fence_full(void)
Full/sequentially-consistent instruction synchronization barrier.
Definition: barrier.h:78
static ALWAYS_INLINE void barrier_dsync_fence_full(void)
Full/sequentially-consistent data synchronization barrier.
Definition: barrier.h:59
static ALWAYS_INLINE void barrier_dmem_fence_full(void)
Full/sequentially-consistent data memory barrier.
Definition: barrier.h:40