Zephyr API Documentation  3.6.99
A Scalable Open Source RTOS
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pbuf.h
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1/*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_IPC_PBUF_H_
8#define ZEPHYR_INCLUDE_IPC_PBUF_H_
9
10#include <zephyr/cache.h>
11#include <zephyr/devicetree.h>
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
25#define PBUF_PACKET_LEN_SZ sizeof(uint32_t)
26
27/* Amount of data that is left unused to distinguish between empty and full. */
28#define _PBUF_IDX_SIZE sizeof(uint32_t)
29
30/* Minimal length of the data field in the buffer to store the smalest packet
31 * possible.
32 * (+1) for at least one byte of data.
33 * (+_PBUF_IDX_SIZE) to distinguish buffer full and buffer empty.
34 * Rounded up to keep wr/rd indexes pointing to aligned address.
35 */
36#define _PBUF_MIN_DATA_LEN ROUND_UP(PBUF_PACKET_LEN_SZ + 1 + _PBUF_IDX_SIZE, _PBUF_IDX_SIZE)
37
42struct pbuf_cfg {
43 volatile uint32_t *rd_idx_loc; /* Address of the variable holding
44 * index value of the first valid byte
45 * in data[].
46 */
47 volatile uint32_t *wr_idx_loc; /* Address of the variable holding
48 * index value of the first free byte
49 * in data[].
50 */
51 uint32_t dcache_alignment; /* CPU data cache line size in bytes.
52 * Used for validation - TODO: To be
53 * replaced by flags.
54 */
55 uint32_t len; /* Length of data[] in bytes. */
56 uint8_t *data_loc; /* Location of the data[]. */
57};
58
65struct pbuf_data {
66 volatile uint32_t wr_idx; /* Index of the first holding first
67 * free byte in data[]. Used for
68 * writing.
69 */
70 volatile uint32_t rd_idx; /* Index of the first holding first
71 * valid byte in data[]. Used for
72 * reading.
73 */
74};
75
76
89struct pbuf {
90 const struct pbuf_cfg *const cfg; /* Configuration of the
91 * buffer.
92 */
93 struct pbuf_data data; /* Data used to read and write
94 * to the buffer
95 */
96};
97
108#define PBUF_CFG_INIT(mem_addr, size, dcache_align) \
109{ \
110 .rd_idx_loc = (uint32_t *)(mem_addr), \
111 .wr_idx_loc = (uint32_t *)((uint8_t *)(mem_addr) + \
112 MAX(dcache_align, _PBUF_IDX_SIZE)), \
113 .data_loc = (uint8_t *)((uint8_t *)(mem_addr) + \
114 MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE), \
115 .len = (uint32_t)((uint32_t)(size) - MAX(dcache_align, _PBUF_IDX_SIZE) - \
116 _PBUF_IDX_SIZE), \
117 .dcache_alignment = (dcache_align), \
118}
119
127#define PBUF_HEADER_OVERHEAD(dcache_align) \
128 (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE)
129
138#define PBUF_DEFINE(name, mem_addr, size, dcache_align) \
139 BUILD_ASSERT(dcache_align >= 0, \
140 "Cache line size must be non negative."); \
141 BUILD_ASSERT((size) > 0 && IS_PTR_ALIGNED_BYTES(size, _PBUF_IDX_SIZE), \
142 "Incorrect size."); \
143 BUILD_ASSERT(IS_PTR_ALIGNED_BYTES(mem_addr, MAX(dcache_align, _PBUF_IDX_SIZE)), \
144 "Misaligned memory."); \
145 BUILD_ASSERT(size >= (MAX(dcache_align, _PBUF_IDX_SIZE) + _PBUF_IDX_SIZE + \
146 _PBUF_MIN_DATA_LEN), "Insufficient size."); \
147 \
148 static const struct pbuf_cfg cfg_##name = \
149 PBUF_CFG_INIT(mem_addr, size, dcache_align); \
150 static struct pbuf name = { \
151 .cfg = &cfg_##name, \
152 }
153
168int pbuf_init(struct pbuf *pb);
169
184int pbuf_write(struct pbuf *pb, const char *buf, uint16_t len);
185
202int pbuf_read(struct pbuf *pb, char *buf, uint16_t len);
203
208#ifdef __cplusplus
209}
210#endif
211
212#endif /* ZEPHYR_INCLUDE_IPC_PBUF_H_ */
cache API interface
Devicetree main header.
int pbuf_read(struct pbuf *pb, char *buf, uint16_t len)
Read specified amount of data from the packet buffer.
int pbuf_init(struct pbuf *pb)
Initialize the packet buffer.
int pbuf_write(struct pbuf *pb, const char *buf, uint16_t len)
Write specified amount of data to the packet buffer.
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Control block of packet buffer.
Definition: pbuf.h:42
uint8_t * data_loc
Definition: pbuf.h:56
uint32_t dcache_alignment
Definition: pbuf.h:51
uint32_t len
Definition: pbuf.h:55
volatile uint32_t * rd_idx_loc
Definition: pbuf.h:43
volatile uint32_t * wr_idx_loc
Definition: pbuf.h:47
Data block of the packed buffer.
Definition: pbuf.h:65
volatile uint32_t wr_idx
Definition: pbuf.h:66
volatile uint32_t rd_idx
Definition: pbuf.h:70
Scure packed buffer.
Definition: pbuf.h:89
const struct pbuf_cfg *const cfg
Definition: pbuf.h:90
struct pbuf_data data
Definition: pbuf.h:93