8#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_SJLI_H
9#define ZEPHYR_INCLUDE_ARCH_ARC_V2_SJLI_H
11#define SJLI_CALL_ARC_SECURE 0
13#define ARC_S_CALL_AUX_READ 0
14#define ARC_S_CALL_AUX_WRITE 1
15#define ARC_S_CALL_IRQ_ALLOC 2
16#define ARC_S_CALL_CLRI 3
17#define ARC_S_CALL_SETI 4
18#define ARC_S_CALL_LIMIT 5
22#define ARC_N_IRQ_START_LEVEL ((CONFIG_NUM_IRQ_PRIO_LEVELS + 1) / 2)
37 (__asm__ volatile("sjli %[sjli_id]\n" :: [sjli_id] "i" (id)))
39#ifdef CONFIG_ARC_SECURE_FIRMWARE
44extern void arc_go_to_normal(
uint32_t addr);
45extern void _arc_do_secure_call(
void);
51#ifdef CONFIG_ARC_NORMAL_FIRMWARE
57 register uint32_t ret __asm__(
"r0") = arg1;
58 register uint32_t r1 __asm__(
"r1") = arg2;
59 register uint32_t r2 __asm__(
"r2") = arg3;
60 register uint32_t r3 __asm__(
"r3") = arg4;
61 register uint32_t r4 __asm__(
"r4") = arg5;
62 register uint32_t r5 __asm__(
"r5") = arg6;
63 register uint32_t r6 __asm__(
"r6") = call_id;
71 "r" (ret),
"r" (r1),
"r" (r2),
"r" (r3),
72 "r" (r4),
"r" (r5),
"r" (r6));
80 register uint32_t ret __asm__(
"r0") = arg1;
81 register uint32_t r1 __asm__(
"r1") = arg2;
82 register uint32_t r2 __asm__(
"r2") = arg3;
83 register uint32_t r3 __asm__(
"r3") = arg4;
84 register uint32_t r4 __asm__(
"r4") = arg5;
85 register uint32_t r6 __asm__(
"r6") = call_id;
93 "r" (ret),
"r" (r1),
"r" (r2),
"r" (r3),
102 register uint32_t ret __asm__(
"r0") = arg1;
103 register uint32_t r1 __asm__(
"r1") = arg2;
104 register uint32_t r2 __asm__(
"r2") = arg3;
105 register uint32_t r3 __asm__(
"r3") = arg4;
106 register uint32_t r6 __asm__(
"r6") = call_id;
114 "r" (ret),
"r" (r1),
"r" (r2),
"r" (r3),
123 register uint32_t ret __asm__(
"r0") = arg1;
124 register uint32_t r1 __asm__(
"r1") = arg2;
125 register uint32_t r2 __asm__(
"r2") = arg3;
126 register uint32_t r6 __asm__(
"r6") = call_id;
134 "r" (ret),
"r" (r1),
"r" (r2),
"r" (r6));
141 register uint32_t ret __asm__(
"r0") = arg1;
142 register uint32_t r1 __asm__(
"r1") = arg2;
143 register uint32_t r6 __asm__(
"r6") = call_id;
151 "r" (ret),
"r" (r1),
"r" (r6));
158 register uint32_t ret __asm__(
"r0") = arg1;
159 register uint32_t r6 __asm__(
"r6") = call_id;
167 "r" (ret),
"r" (r6));
174 register uint32_t ret __asm__(
"r0");
175 register uint32_t r6 __asm__(
"r6") = call_id;
183 "r" (ret),
"r" (r6));
188static inline bool _arch_is_user_context(
void)
194 __asm__
volatile(
"lr %0, [%[status32]]\n"
196 : [status32]
"i" (_ARC_V2_STATUS32));
198 return !(status & _ARC_V2_STATUS32_US) ?
true :
false;
#define ARC_S_CALL_LIMIT
Definition: arc_secure.h:18
#define SJLI_CALL_ARC_SECURE
Definition: arc_secure.h:11
ARCv2 auxiliary registers definitions.
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90