16#ifndef ZEPHYR_INCLUDE_ARCH_ARC_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARC_ARCH_H_
35#ifdef CONFIG_ARC_CONNECT
39#ifdef CONFIG_ISA_ARCV2
41#ifdef CONFIG_ARC_HAS_SECURE
46#if defined(CONFIG_ARC_FIRQ) && defined(CONFIG_ISA_ARCV3)
47#error "Unsupported configuration: ARC_FIRQ and ISA_ARCV3"
55#if defined(CONFIG_ARC_FIRQ) && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
56#error "Unsupported configuration: ARC_FIRQ and (NUM_IRQ_PRIO_LEVELS < 2)"
59#if CONFIG_RGF_NUM_BANKS > 1 && !defined(CONFIG_ARC_FIRQ)
60#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and !ARC_FIRQ"
68#if CONFIG_RGF_NUM_BANKS > 1 && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
69#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and (NUM_IRQ_PRIO_LEVELS < 2)"
72#if defined(CONFIG_ARC_FIRQ_STACK) && !defined(CONFIG_ARC_FIRQ)
73#error "Unsupported configuration: ARC_FIRQ_STACK and !ARC_FIRQ"
76#if defined(CONFIG_ARC_FIRQ_STACK) && CONFIG_RGF_NUM_BANKS < 2
77#error "Unsupported configuration: ARC_FIRQ_STACK and (RGF_NUM_BANKS < 2)"
81#if defined(CONFIG_ARC_FIRQ) && defined(CONFIG_ARC_HAS_SECURE)
82#error "Unsupported configuration: ARC_FIRQ and ARC_HAS_SECURE"
85#if defined(CONFIG_SMP) && !defined(CONFIG_MULTITHREADING)
86#error "Non-multithreading mode isn't supported on SMP targets"
96#define ARCH_STACK_PTR_ALIGN 8
98#define ARCH_STACK_PTR_ALIGN 4
102 "CONFIG_ISR_STACK_SIZE must be a multiple of ARCH_STACK_PTR_ALIGN");
105 "CONFIG_ARC_EXCEPTION_STACK_SIZE must be a multiple of ARCH_STACK_PTR_ALIGN");
115#ifdef CONFIG_ARC_CORE_MPU
116#if CONFIG_ARC_MPU_VER == 2
117#define Z_ARC_MPU_ALIGN 2048
118#elif (CONFIG_ARC_MPU_VER == 3) || (CONFIG_ARC_MPU_VER == 4) || \
119 (CONFIG_ARC_MPU_VER == 6) || (CONFIG_ARC_MPU_VER == 8)
120#define Z_ARC_MPU_ALIGN 32
122#error "Unsupported MPU version"
126#ifdef CONFIG_MPU_STACK_GUARD
127#define Z_ARC_STACK_GUARD_SIZE Z_ARC_MPU_ALIGN
129#define Z_ARC_STACK_GUARD_SIZE 0
144#ifdef CONFIG_MPU_STACK_GUARD
145#define ARCH_KERNEL_STACK_RESERVED Z_ARC_STACK_GUARD_SIZE
146#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_ARC_MPU_ALIGN
149#ifdef CONFIG_USERSPACE
157#ifdef CONFIG_MPU_STACK_GUARD
174#define ARCH_THREAD_STACK_RESERVED (Z_ARC_STACK_GUARD_SIZE + \
175 CONFIG_PRIVILEGED_STACK_SIZE)
176#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
180#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
181 (ROUND_UP((size), Z_ARC_MPU_ALIGN))
182BUILD_ASSERT(CONFIG_PRIVILEGED_STACK_SIZE % Z_ARC_MPU_ALIGN == 0,
183 "improper privilege stack size");
186#ifdef CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
202#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
203 Z_POW2_CEIL(ROUND_UP((size), Z_ARC_MPU_ALIGN))
204#define ARCH_THREAD_STACK_OBJ_ALIGN(size) \
205 ARCH_THREAD_STACK_SIZE_ADJUST(size)
206#define ARCH_THREAD_STACK_RESERVED 0
220#define ARCH_THREAD_STACK_RESERVED CONFIG_PRIVILEGED_STACK_SIZE
221#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
222 (ROUND_UP((size), Z_ARC_MPU_ALIGN))
223#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
225BUILD_ASSERT(CONFIG_PRIVILEGED_STACK_SIZE % Z_ARC_MPU_ALIGN == 0,
226 "improper privilege stack size");
232#ifdef CONFIG_MPU_STACK_GUARD
247#define ARCH_THREAD_STACK_RESERVED Z_ARC_STACK_GUARD_SIZE
248#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_ARC_MPU_ALIGN
260#define K_MEM_PARTITION_P_NA_U_NA AUX_MPU_ATTR_N
261#define K_MEM_PARTITION_P_RW_U_RW (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_UR | \
262 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
263#define K_MEM_PARTITION_P_RW_U_RO (AUX_MPU_ATTR_UR | \
264 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
265#define K_MEM_PARTITION_P_RW_U_NA (AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR)
266#define K_MEM_PARTITION_P_RO_U_RO (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)
267#define K_MEM_PARTITION_P_RO_U_NA (AUX_MPU_ATTR_KR)
270#define K_MEM_PARTITION_P_RWX_U_RWX (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_UR | \
271 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | \
272 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
273#define K_MEM_PARTITION_P_RWX_U_RX (AUX_MPU_ATTR_UR | \
274 AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR | \
275 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
276#define K_MEM_PARTITION_P_RX_U_RX (AUX_MPU_ATTR_UR | \
278 AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE)
280#define K_MEM_PARTITION_IS_WRITABLE(attr) \
282 int __is_writable__; \
283 switch (attr & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) { \
284 case (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW): \
285 case AUX_MPU_ATTR_UW: \
286 case AUX_MPU_ATTR_KW: \
287 __is_writable__ = 1; \
290 __is_writable__ = 0; \
295#define K_MEM_PARTITION_IS_EXECUTABLE(attr) \
296 ((attr) & (AUX_MPU_ATTR_KE | AUX_MPU_ATTR_UE))
305#define IS_BUILTIN_MWDT(val) __builtin_constant_p((uintptr_t)(val))
306#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3 || CONFIG_ARC_MPU_VER == 6
307#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
308 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? !((size) & ((size) - 1)) : 1, \
309 "partition size must be power of 2"); \
310 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) >= Z_ARC_MPU_ALIGN : 1, \
311 "partition size must be >= mpu address alignment."); \
312 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? IS_BUILTIN_MWDT(start) ? \
313 !((uintptr_t)(start) & ((size) - 1)) : 1 : 1, \
314 "partition start address must align with size.")
315#elif CONFIG_ARC_MPU_VER == 4 || CONFIG_ARC_MPU_VER == 8
316#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
317 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) % Z_ARC_MPU_ALIGN == 0 : 1, \
318 "partition size must align with " STRINGIFY(Z_ARC_MPU_ALIGN)); \
319 BUILD_ASSERT(IS_BUILTIN_MWDT(size) ? (size) >= Z_ARC_MPU_ALIGN : 1, \
320 "partition size must be >= " STRINGIFY(Z_ARC_MPU_ALIGN)); \
321 BUILD_ASSERT(IS_BUILTIN_MWDT(start) ? (uintptr_t)(start) % Z_ARC_MPU_ALIGN == 0 : 1, \
322 "partition start address must align with " STRINGIFY(Z_ARC_MPU_ALIGN))
325#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3 || CONFIG_ARC_MPU_VER == 6
326#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
327 BUILD_ASSERT(!((size) & ((size) - 1)), \
328 "partition size must be power of 2"); \
329 BUILD_ASSERT((size) >= Z_ARC_MPU_ALIGN, \
330 "partition size must be >= mpu address alignment."); \
331 BUILD_ASSERT(!((uintptr_t)(start) & ((size) - 1)), \
332 "partition start address must align with size.")
333#elif CONFIG_ARC_MPU_VER == 4 || CONFIG_ARC_MPU_VER == 8
334#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
335 BUILD_ASSERT((size) % Z_ARC_MPU_ALIGN == 0, \
336 "partition size must align with " STRINGIFY(Z_ARC_MPU_ALIGN)); \
337 BUILD_ASSERT((size) >= Z_ARC_MPU_ALIGN, \
338 "partition size must be >= " STRINGIFY(Z_ARC_MPU_ALIGN)); \
339 BUILD_ASSERT((uintptr_t)(start) % Z_ARC_MPU_ALIGN == 0, \
340 "partition start address must align with " STRINGIFY(Z_ARC_MPU_ALIGN))
354extern char __arc_rw_sram_size[];
static ALWAYS_INLINE void arch_nop(void)
Definition: arch.h:348
uint32_t k_mem_partition_attr_t
Definition: arch.h:346
#define ARCH_STACK_PTR_ALIGN
Definition: arch.h:98
ARCv2 public error handling.
ARCv2 public exception handling.
ARCv2 public kernel miscellaneous.
ARCv2 ARC Connect driver.
Per-arch thread definition.
ARCv2 public interrupt handling.
ARCv2 auxiliary registers definitions.
#define ALWAYS_INLINE
Definition: common.h:129
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
Software-managed ISR table.