st,stm32-qspi
Vendor: STMicroelectronics
Description
These nodes are “qspi” bus nodes.
STM32 QSPI device representation. A stm32 quadspi node would typically
looks to this:
&quadspi {
pinctrl-0 = <&quadspi_clk_pe10 &quadspi_ncs_pe11
&quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
&quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15>;
dmas = <&dma1 5 5 0x0000 0x03>;
dma-names = "tx_rx";
status = "okay";
};
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
This property is required. |
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Names for the provided states. The number of names needs to match the
number of states.
This property is required. |
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FLash ID number. This number, if defined, helps to select the right
QSPI GPIO banks (defined as 'quadspi_bk[12]' in pinctrl property)
to communicate with flash memory.
For example
flash-id = <2>;
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-qspi” compatible.
Name |
Type |
Details |
|---|---|---|
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
This property is required. See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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Optional DMA channel specifier. If DMA should be used, specifier should
hold a phandle reference to the dma controller (not the DMAMUX even if present),
the channel number, the slot number, channel configuration and finally features.
(depending on the type of DMA: 'features' is optional)
When a DMAMUX is present and enabled, the channel is the dma one
(not dmamux channel). The request is given by the DMAMUX (no 'features' required).
For example with DMA 2 for TX/RX on QSPI like stm32l496 (no 'features')
/* select DMA2 channel 7 request 3 for QUADSPI */
dmas = <&dma2 7 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>;
For example with a DMAMUX for TX/RX on QSPI like stm32wb55 (no 'features')
/* select DMA2 channel 0, request 20 for QUADSPI */
dmas = <&dma2 0 20 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)>;
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DMA channel name. If DMA should be used, expected value is "tx_rx".
For example
dma-names = "tx_rx";
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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