nxp,s32k3-pinctrl

Vendor: NXP Semiconductors

Description

NXP S32 pinctrl node for S32K3 SoCs.

The NXP S32 pin controller is a singleton node responsible for controlling
the pin function selection and pin properties. This node, labeled 'pinctrl' in
the SoC's devicetree, will define pin configurations in pin groups. Each group
within the pin configuration defines the pin configuration for a peripheral,
and each numbered subgroup in the pin group defines all the pins for that
peripheral with the same configuration properties. The 'pinmux' property in
a group selects the pins to be configured, and the remaining properties set
configuration values for those pins.

For example, to configure the pinmux for UART0, modify the 'pinctrl' from your
board or application devicetree overlay as follows:

  /* Include the SoC package header containing the predefined pins definitions */
  #include <nxp/s32/S32K344-257BGA-pinctrl.h>

  &pinctrl {
    uart0_default: uart0_default {
      group1 {
        pinmux = <PTA3_LPUART0_TX_O>;
        output-enable;
      };
      group2 {
        pinmux = <PTA28_LPUART0_RX>;
        input-enable;
      };
    };
  };

The 'uart0_default' node contains the pin configurations for a particular state
of a device. The 'default' state is the active state. Other states for the same
device can be specified in separate child nodes of 'pinctrl'.

In addition to 'pinmux' property, each group can contain other properties such as
'bias-pull-up' or 'slew-rate' that will be applied to all the pins defined in
'pinmux' array. To enable the input buffer use 'input-enable' and to enable the
output buffer use 'output-enable'.

To link the pin configurations with UART0 device, use pinctrl-N property in the
device node, where 'N' is the zero-based state index (0 is the default state).
Following previous example:

  &uart0 {
    pinctrl-0 = <&uart0_default>;
    pinctrl-names = "default";
    status = "okay";
  };

If only the required properties are supplied, the pin configuration register
will be assigned the following values:
  - input and output buffers disabled
  - internal pull not enabled
  - slew rate "fastest"
  - invert disabled
  - drive strength disabled.

Additionally, following settings are currently not supported and default to
the values indicated below:
  - Safe Mode Control (disabled)
  - Pad Keeping (disabled)
  - Input Filter (disabled).

Properties

Top level properties

These property descriptions apply to “nxp,s32k3-pinctrl” nodes themselves. This page also describes child node properties in the following sections.

Node specific propertiesDeprecated node specific propertiesBase properties

Properties not inherited from the base binding file.

(None)

Grandchild node properties

Name	Type	Details
bias-disable	boolean	disable any pin bias
bias-pull-up	boolean	enable pull-up resistor
bias-pull-down	boolean	enable pull-down resistor
input-enable	boolean	enable input on pin (e.g. enable an input buffer, no effect on output)
output-enable	boolean	enable output on a pin without actively driving it (e.g. enable an output buffer)
pinmux	array	An array of pins sharing the same group properties. The pins must be defined using the S32_PINMUX macros that encodes all the pin muxing information in a 32-bit value. This property is required.
slew-rate	string	Slew rate control. Can be either slowest or fastest setting. See the SoC reference manual for applicability of this setting. Default value: fastest Legal values: 'fastest', 'slowest'
nxp,invert	boolean	Invert the signal selected by Source Signal Selection (SSS) before transmitting it to the associated destination (chip pin or module port).
nxp,drive-strength	boolean	Drive strength enable. See the SoC reference manual for applicability of this setting.