nxp,mci-io-mux
Vendor: NXP Semiconductors
Description
MCI IO MUX pin control node. This node defines pin configurations in pin
groups, and has the 'pinctrl' node identifier in the SOC's devicetree. Each
group within the pin configuration defines a peripheral's pin configuration.
Each numbered subgroup represents pins with shared configuration for that
peripheral. The 'pinmux' property of each group selects the pins to be
configured with these properties. For example, here is a configuration
for FLEXCOMM0 pins:
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <IO_MUX_FC0_USART_DATA_IO2>,
<IO_MUX_FC0_USART_DATA_IO3>;
slew-rate = "normal";
};
};
If only the required properties are supplied, the pin will be configured
as normal drive strength and no pull. This corresponds to the following
pin settings:
PAD_PU_PD_ENx = (0x0 << pin_index)
SR_CONFIGx = (0x2 << pin_index)
Note
Note the inherited pinctrl properties defined below have the following effects:
bias-pull-up: PAD_PU_PD_ENx= (0x1 << pin_index)
bias-pull-down: PAD_PU_PD_ENx= (0x10 << pin_index)
Properties
Top level properties
These property descriptions apply to “nxp,mci-io-mux” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
(None)
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,mci-io-mux” compatible.
Name |
Type |
Details |
|---|---|---|
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
|
|
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
|
|
|
Automatically configure the device for runtime power management after the
init function runs.
|
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indicates the operational status of a device
Legal values: See Important properties for more information. |
|
|
compatible strings
This property is required. See Important properties for more information. |
|
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register space
See Important properties for more information. |
|
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name of each register space
|
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interrupts for device
See Important properties for more information. |
|
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extended interrupt specifier for device
|
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name of each interrupt
|
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phandle to interrupt controller node
|
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
|
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Clock gate information
|
|
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name of each clock
|
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number of address cells in reg property
|
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number of size cells in reg property
|
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DMA channels specifiers
|
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Provided names of DMA channel specifiers
|
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IO channels specifiers
|
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Provided names of IO channel specifiers
|
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mailbox / IPM channels specifiers
|
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Provided names of mailbox / IPM channel specifiers
|
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
|
Grandchild node properties
Name |
Type |
Details |
|---|---|---|
|
|
enable pull-up resistor
|
|
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enable pull-down resistor
|
|
|
Pin mux selection for this group. See the SOC level pinctrl header
file in NXP's HAL for a defined list of these options.
This property is required. |
|
|
Pin output slew rate. Sets the GPIOxx_SR field in the SR_CONFIGx
register.
0 - slow slew rate
1 - normal slew rate
2 - fast slew rate
3 - fastest slew rate (ultra)
This property is required. Legal values: |