microchip,xec-uart

Vendor: Microchip Technology Inc.

Description

These nodes are “uart” bus nodes.

Microchip XEC UART

Properties

Properties not inherited from the base binding file.

Name

Type

Details

ldn

int

logical device number

This property is required.

girqs

array

UART GIRQ and bit position in EC interrupt aggregator

This property is required.

pcrs

array

UART Power Clock Reset(PCR) register index and bit position

This property is required.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

wakerx-gpios

phandle-array

GPIO configured as UART RX wake source

clock-frequency

int

Clock frequency information for UART operation

current-speed

int

Initial baud rate setting for UART

hw-flow-control

boolean

Set to enable RTS/CTS flow control at boot time

parity

string

Configures the parity of the adapter. Enumeration id 0 for none, 1 for odd
and 2 for even parity. Default to none if not specified.

Legal values: 'none', 'odd', 'even'

stop-bits

string

Sets the number of stop bits.

Legal values: '0_5', '1', '1_5', '2'

data-bits

int

Sets the number of data bits.

Legal values: 5, 6, 7, 8, 9

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.