st,stm32-pinctrl
Vendor: STMicroelectronics
Description
STM32 Pin controller Node
Based on pincfg-node.yaml binding.
Note: `bias-disable` and `drive-push-pull` are default pin configurations.
They will be applied in case no `bias-foo` or `driver-bar` properties
are set.
Properties
Top level properties
These property descriptions apply to “st,stm32-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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Remaps the PA11 pin to operate as PA9 pin. Use of this property is restricted to STM32G0 SoCs.
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Remaps the PA12 pin to operate as PA10 pin. Use of this property is restricted to STM32G0 SoCs.
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Remaps the PA11/PA12 pin to operate as PA9/PA10 pin. Use of this property is restricted to STM32F070x SoCs.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-pinctrl” compatible.
Name |
Type |
Details |
|---|---|---|
|
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register space
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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Child node properties
Name |
Type |
Details |
|---|---|---|
|
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Reused from
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
Integer array, represents gpio pin number and mux setting.
These defines are calculated as: ((port * 16 + line) << 8) | function
With:
- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
- function: The function number, can be:
* 0 : Alternate Function 0
* 1 : Alternate Function 1
* 2 : Alternate Function 2
* ...
* 15 : Alternate Function 15
* 16 : Analog
* 17 : GPIO
In case selected pin function is GPIO, pin is statically configured as
a plain input/output GPIO. Default configuration is input. Output value
can be configured by adding 'ouptut-low' or 'output-high' properties
to the pin configuration.
To simplify the usage, macro is available to generate "pinmux" field.
This macro is available here:
-include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h
Some examples of macro usage:
GPIO A9 set as alernate function 2
... {
pinmux = <STM32_PINMUX('A', 9, AF2)>;
};
GPIO A9 set as analog
... {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
};
GPIO A9 set as GPIO output high
... {
pinmux = <STM32_PINMUX('A', 9, GPIO)>;
output-high;
};
This property is required. |
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Pin speed. Default to low-speed. For few pins (PA11 and
PB3 depending on SoCs)hardware reset value could differ
(very-high-speed). Carefully check reference manual for these pins.
Default value: Legal values: |
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disable any pin bias
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enable pull-up resistor
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enable pull-down resistor
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drive actively high and low
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drive with open drain (hardware AND)
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set the pin to output mode with low level
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set the pin to output mode with high level
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