nxp,imx8m-pinctrl
Vendor: NXP Semiconductors
Description
The node has the 'pinctrl' node label set in MCUX SoC's devicetree. These
nodes can be autogenerated using the MCUXpresso config tools combined with
the imx_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
fields in a group select the pins to be configured, and the remaining
devicetree properties set configuration values for those pins
for example, here is an group configuring UART2 pins:
group0 {
pinmux = <&iomuxc_uart2_rxd_uart_rx_uart2_rx,
&iomuxc_uart2_txd_uart_tx_uart2_tx>;
drive-strength = "40-ohm";
slew-rate = "slow";
};
This will select UART2_RXD as UART2 rx, and UART2_TXD as UART2 tx.
Both pins will be configured with a slow slew rate, and maximum drive
strength.
Note that the soc level iomuxc dts file can be examined to find the possible
pinmux options. Here are the affects of each property on the
IOMUXC SW_PAD_CTL register:
nxp,lvttl: LVTTL=1
input-schmitt-enable: HYS=1
bias-pull-up: PUE=1
drive-open-drain: ODE=1
slew-rate: SRE=<enum_idx>
drive-strength: DSE=<enum_idx>
input-enable: SION=1 (in SW_MUX_CTL_PAD register)
If only required properties are supplied, the pin will have the following
configuration:
LVTLL=0,
HYS=0,
PUE=0,
ODE=0,
SRE=<slew-rate>,
DSE=<drive-strength>,
SION=0,
Properties
Top level properties
These property descriptions apply to “nxp,imx8m-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
(None)
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,imx8m-pinctrl” compatible.
Name |
Type |
Details |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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interrupts for device
See Important properties for more information. |
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
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Automatically configure the device for runtime power management after the
init function runs.
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Grandchild node properties
Name |
Type |
Details |
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Pin mux selections for this group. See the soc level iomuxc DTSI file
for a defined list of these options.
This property is required. |
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Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
the drive strength is expressed as a output impedance at a given voltage,
but maximum current values can be calculated from these impedances
for a specific load impedance.
000 HI-Z — Output driver is disabled (Hi-Z State)
001 255_OHM — 255 Ohm @3.3V, 240 Ohm @2.5V, 230 Ohm @1.8V, 265 Ohm @1.2V
010 105_OHM — 105 Ohm @3.3V, 100 Ohm @2.5V, 85 Ohm @1.8V, 110 Ohm @1.2V
011 75_OHM — 75 Ohm @3.3V, 70 Ohm @2.5V, 60 Ohm @1.8V, 80 Ohm @1.2V
100 85_OHM — 85 Ohm @3.3V, 80 Ohm @2.5V, 75 Ohm @1.8V, 90 Ohm @1.2V
101 65_OHM — 65 Ohm @3.3V, 60 Ohm @2.5V, 55 Ohm @1.8V, 65 Ohm @1.2V
110 45_OHM — 45 Ohm @3.3V, 45 Ohm @2.5V, 40 Ohm @1.8V, 50 Ohm @1.2V
111 40_OHM — 40 Ohm @3.3V, 40 Ohm @2.5V, 33 Ohm @1.8V, 40 Ohm @1.2V
This property is required. Legal values: |
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Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
00 SLOW — Slow Frequency Slew Rate (50Mhz)
01 MEDIUM — Medium Frequency Slew Rate (100Mhz)
10 FAST — Fast Frequency Slew Rate (150Mhz)
11 MAX — Max Frequency Slew Rate (200Mhz)
This property is required. Legal values: |
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Enable LVTTL input. Sets LVTTL field in IOMUXC peripheral
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enable pull-up resistor
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enable pull-down resistor
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drive with open drain (hardware AND)
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enable input on pin (e.g. enable an input buffer, no effect on output)
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enable schmitt-trigger mode
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