nxp,s32-mru
Vendor: NXP Semiconductors
Description
NXP S32 Message Receive Unit
The MRU couples with a processor and allows to receive messages from senders,
which are other modules or processors. The interrupts from each MRU instance
route to specific Private Peripheral Interrupts (PPIs) of the corresponding
core.
This driver offers a simplified operation in order to integrate with Zephyr
Mbox API:
- Each channel uses only the first mailbox, as current API does not allow
to group hardware channel's mailboxes in logical channels.
- The MTU is fixed to the size of one mailbox, as current API does not
allow variable length per channel.
In a normal use-case for IPC, the receiver core must enable and set the number
of receive channels on the MRU instance coupled with the core, for instance in
a devicetree overlay. In turn, the sender(s) must enable the MRU instance of the
receiver to be able to transmit on it. There is no need to define the transmit
channels on which the sender is intended to transmit.
For example, core B and C want to send messages to core A in channels 0 and 1,
respectively, then the devicetree overlays will look like:
// overlay of core A
mruA {
rx-channels = <2>;
status = "okay";
};
// overlays of core B and core C
mruA {
status = "okay";
};
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
|
|
Number of receive channels enabled on this instance.
Setting this value to N, will enable channels 0 to N-1, consecutively.
It should be set by the receiver core coupled with this MRU instance.
For example, if receiver A wants to Rx on channels 0 and 1, then A must
set rx-channels of mruA as follows:
mruA {
rx-channels = <2>;
status = "okay";
};
Legal values: |
|
|
Number of items to expect in a Mailbox specifier
This property is required. |
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,s32-mru” compatible.
Name |
Type |
Details |
|---|---|---|
|
|
interrupts for device
This property is required. See Important properties for more information. |
|
|
indicates the operational status of a device
Legal values: See Important properties for more information. |
|
|
compatible strings
This property is required. See Important properties for more information. |
|
|
register space
See Important properties for more information. |
|
|
name of each register space
|
|
|
extended interrupt specifier for device
|
|
|
name of each interrupt
|
|
|
phandle to interrupt controller node
|
|
|
Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
|
|
Clock gate information
|
|
|
name of each clock
|
|
|
number of address cells in reg property
|
|
|
number of size cells in reg property
|
|
|
DMA channels specifiers
|
|
|
Provided names of DMA channel specifiers
|
|
|
IO channels specifiers
|
|
|
Provided names of IO channel specifiers
|
|
|
mailbox / IPM channels specifiers
|
|
|
Provided names of mailbox / IPM channel specifiers
|
|
|
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
|
|
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
|
|
|
Automatically configure the device for runtime power management after the
init function runs.
|
Specifier cell names
mbox cells: channel