st,stm32-dma
Vendor: STMicroelectronics
Description
These nodes are “dma” bus nodes.
STM32 DMA controller
The STM32 DMA is a general-purpose direct memory access controller
capable of supporting 5 or 6 or 7 or 8 independent DMA channels.
Each stm32 soc with a DMA is of a special version type, which could be
V1 like stm32F4 or stm32F2 socs, they include FIFO control registers
or V2 like stm32L4 soc or stm322WB, some also have DMAMUX controller
or V2bis like stm32F1 or stm32L1, where requests are multiplexed
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
|
|
If the DMA controller V1 supports memory to memory transfer
|
|
|
offset in the table of channels when mapping to a DMAMUX
for 1st dma instance, offset is 0,
for 2nd dma instance, offset is the nb of dma channels of the 1st dma,
for 3rd dma instance, offset is the nb of dma channels of the 2nd dma
plus the nb of dma channels of the 1st dma instance, etc.
|
|
|
Number of items to expect in a DMA specifier
This property is required. |
|
|
Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.
|
|
|
Number of DMA channels supported by the controller
|
|
|
Number of DMA request signals supported by the controller.
|
|
|
Memory address alignment requirement for DMA buffers used by the controller.
|
|
|
Memory size alignment requirement for DMA buffers used by the controller.
|
|
|
Minimal chunk of data possible to be copied by the controller.
|
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-dma” compatible.
Name |
Type |
Details |
|---|---|---|
|
|
register space
This property is required. See Important properties for more information. |
|
|
interrupts for device
This property is required. See Important properties for more information. |
|
|
indicates the operational status of a device
Legal values: See Important properties for more information. |
|
|
compatible strings
This property is required. See Important properties for more information. |
|
|
name of each register space
|
|
|
extended interrupt specifier for device
|
|
|
name of each interrupt
|
|
|
phandle to interrupt controller node
|
|
|
Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
|
|
Clock gate information
|
|
|
name of each clock
|
|
|
number of address cells in reg property
|
|
|
number of size cells in reg property
|
|
|
DMA channels specifiers
|
|
|
Provided names of DMA channel specifiers
|
|
|
IO channels specifiers
|
|
|
Provided names of IO channel specifiers
|
|
|
mailbox / IPM channels specifiers
|
|
|
Provided names of mailbox / IPM channel specifiers
|
|
|
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
|
|
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
|
|
|
Automatically configure the device for runtime power management after the
init function runs.
|