Hexiwear KW40Z
Overview
See Hexiwear for a general overview of the Hexiwear board and the main application SoC, the K64. The KW40Z is a secondary SoC on the board that provides wireless connectivity with a multimode BLE and 802.15.4 radio.
For more information about the KW40Z SoC:
Supported Features
The hexiwear_kw40z board configuration supports the following hardware features:
Interface |
Controller |
Driver/Component |
---|---|---|
NVIC |
on-chip |
nested vector interrupt controller |
SYSTICK |
on-chip |
systick |
PINMUX |
on-chip |
pinmux |
GPIO |
on-chip |
gpio |
ADC |
on-chip |
adc |
UART |
on-chip |
serial port-polling; serial port-interrupt |
RTT |
on-chip |
console |
FLASH |
on-chip |
soc flash |
TRNG |
on-chip |
entropy |
The default configuration can be found in the defconfig file:
boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig
Other hardware features are not currently supported by the port.
Connections and IOs
The KW40Z SoC has three pairs of pinmux/gpio controllers, but only one is currently enabled (PORTC/GPIOC) for the hexiwear_kw40z board.
Name |
Function |
Usage |
---|---|---|
PTB1 |
ADC |
ADC0 channel 1 |
PTC6 |
UART0_RX |
UART BT HCI |
PTC7 |
UART0_TX |
UART BT HCI |
System Clock
The KW40Z SoC is configured to use the 32 MHz external oscillator on the board with the on-chip FLL to generate a 40 MHz system clock.
Serial Port
The KW40Z SoC has one UART, which is used for BT HCI. There is no UART available for a console.
Programming and Debugging
Build and flash applications as usual (see Building an Application and Run an Application for more details).
Configuring a Debug Probe
A debug probe is used for both flashing and debugging the board. This board is configured by default to use the OpenSDA DAPLink Onboard Debug Probe, but because Segger RTT is required for a console, you must reconfigure the board for one of the following debug probes instead.
OpenSDA J-Link Onboard Debug Probe
Install the J-Link Debug Host Tools and make sure they are in your search path.
Follow the instructions in OpenSDA J-Link Onboard Debug Probe to program the OpenSDA J-Link Generic Firmware for V2.1 Bootloader. Check that switches SW1 and SW2 are off, and SW3 and SW4 are on to ensure KW40Z SWD signals are connected to the OpenSDA microcontroller.
Configuring a Console
The console is available using Segger RTT.
Connect a USB cable from your PC to CN1.
Once you have started a debug session, run telnet:
$ telnet localhost 19021
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
SEGGER J-Link V6.44 - Real time terminal output
J-Link OpenSDA 2 compiled Feb 28 2017 19:27:57 V1.0, SN=621000000
Process: JLinkGDBServerCLExe
Flashing
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b hexiwear_kw40z samples/hello_world
west flash
The Segger RTT console is only available during a debug session. Use attach
to start one:
# From the root of the zephyr repository
west build -b hexiwear_kw40z samples/hello_world
west attach
Run telnet as shown earlier, and you should see the following message in the terminal:
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! hexiwear_kw40z
Debugging
Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b hexiwear_kw40z samples/hello_world
west debug
Run telnet as shown earlier, step through the application in your debugger, and you should see the following message in the terminal:
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! hexiwear_kw40z