SPU HAL

group nrf_spu_hal

Hardware access layer for managing the System Protection Unit (SPU) peripheral.

Defines

NRF_SPU_HAS_OWNERSHIP: Presence of ownership feature.

NRF_SPU_HAS_MEMORY: Presence of memory feature.

NRF_SPU_HAS_BELLS: Symbol indicating whether SPU has registers related to BELLS.

NRF_SPU_HAS_DOMAIN: Symbol indicating whether SPU uses DOMAIN register name.

NRF_SPU_HAS_IPCT: Symbol indicating whether SPU has registers related to IPCT.

NRF_SPU_PERIPH_COUNT: Number of peripherals.

NRF_SPU_FEATURE_IPCT_CHANNEL_COUNT: Number of IPCT channels.

NRF_SPU_FEATURE_IPCT_INTERRUPT_COUNT: Number of IPCT interrupts.

NRF_SPU_FEATURE_DPPI_CHANNEL_COUNT: Number of DPPI channels.

NRF_SPU_FEATURE_DPPI_CHANNEL_GROUP_COUNT: Number of DPPI channel groups.

NRF_SPU_FEATURE_GPIOTE_COUNT: Number of GPIOTEs.

NRF_SPU_FEATURE_GPIOTE_CHANNEL_COUNT: Number of GPIOTE channels.

NRF_SPU_FEATURE_GPIOTE_INTERRUPT_COUNT: Number of GPIOTE interrupts.

NRF_SPU_FEATURE_GPIO_COUNT: Number of GPIOs.

NRF_SPU_FEATURE_GPIO_PIN_COUNT: Number of GPIO pins.

NRF_SPU_FEATURE_GRTC_CC_COUNT: Number of GRTC compare channels.

NRF_SPU_FEATURE_GRTC_INTERRUPT_COUNT: Number of GRTC interrupts..

NRF_SPU_FEATURE_BELL_DOMAIN_COUNT: Number of BELL domains.

NRF_SPU_FEATURE_BELL_BELL_COUNT: Number of BELL Domain/Processor features.

Enums

enum nrf_spu_event_t

SPU events.

Values:

enumerator NRF_SPU_EVENT_RAMACCERR: A security violation has been detected for the RAM memory space.

enumerator NRF_SPU_EVENT_FLASHACCERR: A security violation has been detected for the Flash memory space.

enumerator NRF_SPU_EVENT_PERIPHACCERR: A security violation has been detected on one or several peripherals.

enum nrf_spu_int_mask_t

SPU interrupts.

Values:

enumerator NRF_SPU_INT_RAMACCERR_MASK: Interrupt on RAMACCERR event.

enumerator NRF_SPU_INT_FLASHACCERR_MASK: Interrupt on FLASHACCERR event.

enumerator NRF_SPU_INT_PERIPHACCERR_MASK: Interrupt on PERIPHACCERR event.

enum nrf_spu_nsc_size_t

SPU Non-Secure Callable (NSC) region size.

Values:

enumerator NRF_SPU_NSC_SIZE_DISABLED: Not defined as a non-secure callable region.

enumerator NRF_SPU_NSC_SIZE_32B: Non-Secure Callable region with a 32-byte size.

enumerator NRF_SPU_NSC_SIZE_64B: Non-Secure Callable region with a 64-byte size.

enumerator NRF_SPU_NSC_SIZE_128B: Non-Secure Callable region with a 128-byte size.

enumerator NRF_SPU_NSC_SIZE_256B: Non-Secure Callable region with a 256-byte size.

enumerator NRF_SPU_NSC_SIZE_512B: Non-Secure Callable region with a 512-byte size.

enumerator NRF_SPU_NSC_SIZE_1024B: Non-Secure Callable region with a 1024-byte size.

enumerator NRF_SPU_NSC_SIZE_2048B: Non-Secure Callable region with a 2048-byte size.

enumerator NRF_SPU_NSC_SIZE_4096B: Non-Secure Callable region with a 4096-byte size.

enum nrf_spu_mem_perm_t

SPU memory region permissions.

Values:

enumerator NRF_SPU_MEM_PERM_EXECUTE: Allow code execution from particular memory region.

enumerator NRF_SPU_MEM_PERM_WRITE: Allow write operation on particular memory region.

enumerator NRF_SPU_MEM_PERM_READ: Allow read operation from particular memory region.

enum nrf_spu_securemapping_t

SPU read capabilities for TrustZone Cortex-M secure attribute.

Values:

enumerator NRF_SPU_SECUREMAPPING_NONSECURE: Peripheral is always accessible as non-secure.

enumerator NRF_SPU_SECUREMAPPING_SECURE: Peripheral is always accessible as secure.

enumerator NRF_SPU_SECUREMAPPING_USERSELECTABLE: Non-secure or secure attribute for this peripheral is defined by the PERIPH[n].PERM register.

enumerator NRF_SPU_SECUREMAPPING_SPLIT: Peripheral implements the split security mechanism.

enum nrf_spu_dma_t

SPU DMA capabilities.

Values:

enumerator NRF_SPU_DMA_NODMA: Peripheral has no DMA capability.

enumerator NRF_SPU_DMA_NOSEPARATEATTRIBUTE: DMA transfers always have the same security attribute as assigned to the peripheral.

enumerator NRF_SPU_DMA_SEPARATEATTRIBUTE: DMA transfers can have a different security attribute than the one assigned to the peripheral.

enum nrf_spu_feature_t

SPU features.

Values:

enumerator NRF_SPU_FEATURE_IPCT_CHANNEL: IPCT channel.

enumerator NRF_SPU_FEATURE_IPCT_INTERRUPT: IPCT interrupt.

enumerator NRF_SPU_FEATURE_DPPI_CHANNEL: DPPI channel.

enumerator NRF_SPU_FEATURE_DPPI_CHANNEL_GROUP: DPPI channel group.

enumerator NRF_SPU_FEATURE_GPIOTE_CHANNEL: GPIOTE channel.

enumerator NRF_SPU_FEATURE_GPIOTE_INTERRUPT: GPIOTE interrupt.

enumerator NRF_SPU_FEATURE_GPIO_PIN: GPIO pin.

enumerator NRF_SPU_FEATURE_GRTC_CC: GRTC compare channel.

enumerator NRF_SPU_FEATURE_GRTC_SYSCOUNTER: GRTC SYSCOUNTER.

enumerator NRF_SPU_FEATURE_GRTC_INTERRUPT: GRTC interrupt.

enumerator NRF_SPU_FEATURE_BELLS_BELL: BELLS bell pair.

Functions

NRF_STATIC_INLINE void nrf_spu_event_clear(NRF_SPU_Type *p_reg, nrf_spu_event_t event)

Function for clearing a specific SPU event.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to clear.

NRF_STATIC_INLINE bool nrf_spu_event_check(NRF_SPU_Type const *p_reg, nrf_spu_event_t event)

Function for retrieving the state of the SPU event.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to be checked.

Return values:

true – The event has been generated.
false – The event has not been generated.

NRF_STATIC_INLINE void nrf_spu_int_enable(NRF_SPU_Type *p_reg, uint32_t mask)

Function for enabling specified interrupts.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Interrupts to be enabled.

NRF_STATIC_INLINE void nrf_spu_int_disable(NRF_SPU_Type *p_reg, uint32_t mask)

Function for disabling specified interrupts.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Interrupts to be disabled.

NRF_STATIC_INLINE uint32_t nrf_spu_int_enable_check(NRF_SPU_Type const *p_reg, uint32_t mask)

Function for checking if the specified interrupts are enabled.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Mask of interrupts to be checked.

Returns:

Mask of enabled interrupts.

NRF_STATIC_INLINE void nrf_spu_publish_set(NRF_SPU_Type *p_reg, nrf_spu_event_t event, uint32_t channel)

Function for setting up publication configuration of a given SPU event.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to configure.
channel – [in] Channel to connect with published event.

NRF_STATIC_INLINE void nrf_spu_publish_clear(NRF_SPU_Type *p_reg, nrf_spu_event_t event)

Function for clearing publication configuration of a given SPU event.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to clear.

NRF_STATIC_INLINE bool nrf_spu_tz_is_available(NRF_SPU_Type const *p_reg)

Function for retrieving the capabilities of the current device.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Return values:

true – ARM TrustZone support is available.
false – ARM TrustZone support is not available.

NRF_STATIC_INLINE void nrf_spu_dppi_config_set(NRF_SPU_Type *p_reg, uint8_t dppi_id, uint32_t channels_mask, bool lock_conf)

Function for configuring the DPPI channels to be available in particular domains.

Channels are configured as bitmask. Set one in bitmask to make channels available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
dppi_id – [in] DPPI peripheral id.
channels_mask – [in] Bitmask with channels configuration.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_gpio_config_set(NRF_SPU_Type *p_reg, uint8_t gpio_port, uint32_t gpio_mask, bool lock_conf)

Function for configuring the GPIO pins to be available in particular domains.

GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
gpio_port – [in] Port number.
gpio_mask – [in] Bitmask with gpio configuration.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_flashnsc_set(NRF_SPU_Type *p_reg, uint8_t flash_nsc_id, nrf_spu_nsc_size_t flash_nsc_size, uint8_t region_number, bool lock_conf)

Function for configuring non-secure callable flash region.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
flash_nsc_id – [in] Non-secure callable flash region ID.
flash_nsc_size – [in] Non-secure callable flash region size.
region_number – [in] Flash region number.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_ramnsc_set(NRF_SPU_Type *p_reg, uint8_t ram_nsc_id, nrf_spu_nsc_size_t ram_nsc_size, uint8_t region_number, bool lock_conf)

Function for configuring non-secure callable RAM region.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
ram_nsc_id – [in] Non-secure callable RAM region ID.
ram_nsc_size – [in] Non-secure callable RAM region size.
region_number – [in] RAM region number.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_flashregion_set(NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)

Function for configuring security for a particular flash region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region_id – [in] Flash region index.
secure_attr – [in] Set region attribute to secure.
permissions – [in] Flash region permissions.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_ramregion_set(NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)

Function for configuring security for the RAM region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
region_id – [in] RAM region index.
secure_attr – [in] Set region attribute to secure.
permissions – [in] RAM region permissions.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_peripheral_set(NRF_SPU_Type *p_reg, uint32_t peripheral_id, bool secure_attr, bool secure_dma, bool lock_conf)

Function for configuring access permissions of the peripheral.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
peripheral_id – [in] ID number of a particular peripheral.
secure_attr – [in] Peripheral registers accessible only from secure domain.
secure_dma – [in] DMA transfers possible only from RAM memory in secure domain.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_extdomain_set(NRF_SPU_Type *p_reg, uint32_t domain_id, bool secure_attr, bool lock_conf)

Function for configuring bus access permissions of the specified external domain.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
domain_id – [in] ID number of a particular external domain.
secure_attr – [in] Specifies if the bus accesses from this domain have the secure attribute set.
lock_conf – [in] Specifies if the configuration should be locked until next SoC reset.

NRF_STATIC_INLINE uint32_t nrf_spu_periphaccerr_address_get(NRF_SPU_Type const *p_reg)

Function for getting the address of the security violation.

Note

The event PERIPHACCERR must be cleared to clear this register.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Returns:

Address of the transaction that caused first error.

NRF_STATIC_INLINE nrf_owner_t nrf_spu_periphaccerr_ownerid_get(NRF_SPU_Type const *p_reg)

Function for getting the owner ID of the security violation.

Note

The event PERIPHACCERR must be cleared to clear this register.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.

Returns:

Owner ID of the transaction that caused first error.

NRF_STATIC_INLINE nrf_spu_securemapping_t nrf_spu_periph_perm_securemapping_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the capabilities for TrustZone Cortex-M secure attribute of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

TrustZone capabilities.

NRF_STATIC_INLINE nrf_spu_dma_t nrf_spu_periph_perm_dma_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the DMA capabilities of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

DMA capabilities.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_secattr_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the security mapping of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Return values:

true – Peripheral is mapped in secure peripheral address space.
false – If TrustZone capabilities are NRF_SPU_SECUREMAPPING_USERSELECTABLE, then peripheral is mapped in non-secure peripheral address space. If TrustZone capabilities are NRF_SPU_SECUREMAPPING_SPLIT, then peripheral is mapped in non-secure and secure peripheral address space.

NRF_STATIC_INLINE void nrf_spu_periph_perm_secattr_set(NRF_SPU_Type *p_reg, uint8_t index, bool enable)

Function for setting the security mapping of the specified slave.

Note

This bit has effect only if TrustZone capabilities are either NRF_SPU_SECUREMAPPING_USERSELECTABLE or NRF_SPU_SECUREMAPPING_SPLIT.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.
enable – [in] True if security mapping is to be set, false otherwise.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_dmasec_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the security attribution for the DMA transfer of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

True if DMA transfers initiated by this peripheral have the secure attribute set, false otherwise.

NRF_STATIC_INLINE void nrf_spu_periph_perm_dmasec_set(NRF_SPU_Type *p_reg, uint8_t index, bool enable)

Function for setting the security attribution for the DMA transfer of the specified slave.

Note

This bit has effect only if peripheral security mapping is enabled.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.
enable – [in] True if secure attribute for the DMA transfer is to be set, false otherwise.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_block_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the status of the peripheral access lock of the specified slave.

Note

When peripheral access lock is enabled, reading or modifying the registers of the peripheral is blocked.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

True if the peripheral access is locked, false otherwise.

NRF_STATIC_INLINE void nrf_spu_periph_perm_block_enable(NRF_SPU_Type *p_reg, uint8_t index)

Function for enabling the peripheral access lock of the specified slave.

Note

When peripheral access lock is enabled, reading or modifying the registers of the peripheral is blocked.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_lock_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the status of the peripheral management lock of the specified slave.

Note

When peripheral management lock is enabled, modifying the SPU configuration associated with specified peripheral is not possible.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

True if the peripheral management is locked, false otherwise.

NRF_STATIC_INLINE void nrf_spu_periph_perm_lock_enable(NRF_SPU_Type *p_reg, uint8_t index)

Function for enabling the peripheral management lock of the specified slave.

Note

When peripheral management lock is enabled, modifying the SPU configuration associated with specified peripheral is not possible.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

NRF_STATIC_INLINE nrf_owner_t nrf_spu_periph_perm_ownerid_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the peripheral owner ID of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

Owner ID.

NRF_STATIC_INLINE void nrf_spu_periph_perm_ownerid_set(NRF_SPU_Type *p_reg, uint8_t index, nrf_owner_t owner_id)

Function for setting the peripheral owner ID of the specified slave.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.
owner_id – [in] Owner ID to be set.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_ownerprog_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the indication if owner ID of the specified slave is programmable or not.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

True if owner ID is programmable, false otherwise.

NRF_STATIC_INLINE bool nrf_spu_periph_perm_present_get(NRF_SPU_Type const *p_reg, uint8_t index)

Function for getting the indication if peripheral with the specified slave index is present.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
index – [in] Peripheral slave index.

Returns:

True if peripheral is present, false otherwise.

NRF_STATIC_INLINE bool nrf_spu_feature_secattr_get(NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for getting the security mapping of the specified feature.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

Return values:

true – Feature is available for secure usage.
false – Feature is available for non-secure usage.

NRF_STATIC_INLINE void nrf_spu_feature_secattr_set(NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex, bool enable)

Function for setting the security mapping of the specified feature.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.
enable – [in] True if security mapping is to be set, false otherwise.

NRF_STATIC_INLINE bool nrf_spu_feature_lock_get(NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for getting the status of the management lock of the specified feature.

Note

When feature management lock is enabled, modifying the SPU configuration associated with specified feature is not possible.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

Returns:

True if feature management is locked, false otherwise.

NRF_STATIC_INLINE void nrf_spu_feature_lock_enable(NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for enabling the management lock of the specified feature.

Note

When feature management lock is enabled, modifying the SPU configuration associated with specified feature is not possible.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

NRF_STATIC_INLINE bool nrf_spu_feature_block_get(NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for getting status of the access lock of the specified feature.

Note

When feature access lock is enabled, reading or modifying the registers of the feature is blocked.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

Returns:

True if the feature access is locked, false otherwise.

NRF_STATIC_INLINE void nrf_spu_feature_block_enable(NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for enabling the feature block of the specified feature.

Note

When feature access lock is enabled, reading or modifying the registers of the feature is blocked.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

NRF_STATIC_INLINE nrf_owner_t nrf_spu_feature_ownerid_get(NRF_SPU_Type const *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex)

Function for getting the feature owner ID of the specified feature.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.

Returns:

Owner ID.

NRF_STATIC_INLINE void nrf_spu_feature_ownerid_set(NRF_SPU_Type *p_reg, nrf_spu_feature_t feature, uint8_t index, uint8_t subindex, nrf_owner_t owner_id)

Function for setting the feature owner ID of the specified feature.

Parameters:

p_reg – [in] Pointer to the structure of registers of the peripheral.
feature – [in] Feature to be accessed.
index – [in] Feature index.
subindex – [in] Feature subindex. Only used for applicable features, otherwise skipped.
owner_id – [in] Owner ID to be set.