PWM HALY

group nrfy_pwm

Hardware access layer with cache and barrier support for managing the PWM peripheral.

Functions

NRFY_STATIC_INLINE void nrfy_pwm_periph_configure(NRF_PWM_Type *p_reg, nrfy_pwm_config_t const *p_config)

Function for configuring the PWM.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

  • p_config – [in] Pointer to the peripheral configuration structure.

NRFY_STATIC_INLINE void nrfy_pwm_int_init(NRF_PWM_Type *p_reg, uint32_t mask, uint8_t irq_priority, bool enable)

Function for initializing the specified PWM interrupts.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

  • mask – [in] Mask of interrupts to be initialized.

  • irq_priority – [in] Interrupt priority.

  • enable – [in] True if interrupts are to be enabled, false otherwise.

NRFY_STATIC_INLINE void nrfy_pwm_int_uninit(NRF_PWM_Type *p_reg)

Function for uninitializing the PWM interrupts.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

NRFY_STATIC_INLINE uint32_t nrfy_pwm_events_process(NRF_PWM_Type *p_reg, uint32_t mask)

Function for processing the specified PWM events.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

  • mask – [in] Mask of events to be processed, created by NRFY_EVENT_TO_INT_BITMASK.

Returns:

Mask of events that were generated and processed. To be checked against the result of NRFY_EVENT_TO_INT_BITMASK().

NRFY_STATIC_INLINE void nrfy_pwm_start(NRF_PWM_Type *p_reg, uint8_t seq_id, bool wait)

Function for starting the PWM sequence.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

  • seq_id – [in] Sequence index.

  • wait – [in] True if the sequence is to be blocking, false otherwise.

NRFY_STATIC_INLINE void nrfy_pwm_abort(NRF_PWM_Type *p_reg, bool wait)

Function for aborting the ongoing PWM sequence.

Parameters:

  • p_reg – [in] Pointer to the structure of registers of the peripheral.

  • wait – [in] True if the abort is to be blocking, false otherwise.

NRFY_STATIC_INLINE void nrfy_pwm_task_trigger(NRF_PWM_Type *p_reg, nrf_pwm_task_t task)

@refhal{nrf_pwm_task_trigger}

NRFY_STATIC_INLINE uint32_t nrfy_pwm_task_address_get(NRF_PWM_Type const *p_reg, nrf_pwm_task_t task)

@refhal{nrf_pwm_task_address_get}

NRFY_STATIC_INLINE void nrfy_pwm_event_clear(NRF_PWM_Type *p_reg, nrf_pwm_event_t event)

@refhal{nrf_pwm_event_clear}

NRFY_STATIC_INLINE bool nrfy_pwm_event_check(NRF_PWM_Type const *p_reg, nrf_pwm_event_t event)

@refhal{nrf_pwm_event_check}

NRFY_STATIC_INLINE uint32_t nrfy_pwm_event_address_get(NRF_PWM_Type const *p_reg, nrf_pwm_event_t event)

@refhal{nrf_pwm_event_address_get}

NRFY_STATIC_INLINE void nrfy_pwm_shorts_enable(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_shorts_enable}

NRFY_STATIC_INLINE void nrfy_pwm_shorts_disable(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_shorts_disable}

NRFY_STATIC_INLINE void nrfy_pwm_shorts_set(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_shorts_set}

NRFY_STATIC_INLINE void nrfy_pwm_int_enable(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_int_enable}

NRFY_STATIC_INLINE void nrfy_pwm_int_disable(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_int_disable}

NRFY_STATIC_INLINE void nrfy_pwm_int_set(NRF_PWM_Type *p_reg, uint32_t mask)

@refhal{nrf_pwm_int_set}

NRFY_STATIC_INLINE uint32_t nrfy_pwm_int_enable_check(NRF_PWM_Type const *p_reg, uint32_t mask)

@refhal{nrf_pwm_int_enable_check}

NRFY_STATIC_INLINE void nrfy_pwm_subscribe_set(NRF_PWM_Type *p_reg, nrf_pwm_task_t task, uint8_t channel)

@refhal{nrf_pwm_subscribe_set}

NRFY_STATIC_INLINE void nrfy_pwm_subscribe_clear(NRF_PWM_Type *p_reg, nrf_pwm_task_t task)

@refhal{nrf_pwm_subscribe_clear}

NRFY_STATIC_INLINE void nrfy_pwm_publish_set(NRF_PWM_Type *p_reg, nrf_pwm_event_t event, uint8_t channel)

@refhal{nrf_pwm_publish_set}

NRFY_STATIC_INLINE void nrfy_pwm_publish_clear(NRF_PWM_Type *p_reg, nrf_pwm_event_t event)

@refhal{nrf_pwm_publish_clear}

NRFY_STATIC_INLINE void nrfy_pwm_enable(NRF_PWM_Type *p_reg)

@refhal{nrf_pwm_enable}

NRFY_STATIC_INLINE void nrfy_pwm_disable(NRF_PWM_Type *p_reg)

@refhal{nrf_pwm_disable}

NRFY_STATIC_INLINE void nrfy_pwm_pins_set(NRF_PWM_Type *p_reg, uint32_t out_pins[NRF_PWM_CHANNEL_COUNT])

@refhal{nrf_pwm_pins_set}

NRFY_STATIC_INLINE uint32_t nrfy_pwm_pin_get(NRF_PWM_Type const *p_reg, uint8_t channel)

@refhal{nrf_pwm_pin_get}

NRFY_STATIC_INLINE void nrfy_pwm_configure(NRF_PWM_Type *p_reg, nrf_pwm_clk_t base_clock, nrf_pwm_mode_t mode, uint16_t top_value)

@refhal{nrf_pwm_configure}

NRFY_STATIC_INLINE void nrfy_pwm_sequence_set(NRF_PWM_Type *p_reg, uint8_t seq_id, nrf_pwm_sequence_t const *p_seq)

@refhal{nrf_pwm_sequence_set}

NRFY_STATIC_INLINE void nrfy_pwm_decoder_set(NRF_PWM_Type *p_reg, nrf_pwm_dec_load_t dec_load, nrf_pwm_dec_step_t dec_step)

@refhal{nrf_pwm_decoder_set}

NRFY_STATIC_INLINE void nrfy_pwm_loop_set(NRF_PWM_Type *p_reg, uint16_t loop_count)

@refhal{nrf_pwm_loop_set}

NRFY_STATIC_INLINE nrf_pwm_task_t nrfy_pwm_seqstart_task_get(uint8_t seq_id)

@refhal{nrf_pwm_seqstart_task_get}

NRFY_STATIC_INLINE nrf_pwm_event_t nrfy_pwm_seqend_event_get(uint8_t seq_id)

@refhal{nrf_pwm_seqend_event_get}

struct nrfy_pwm_config_t
#include <nrfy_pwm.h>

PWM configuration structure.

Public Members

uint32_t output_pins[NRF_PWM_CHANNEL_COUNT]

Pin numbers for individual output channels (optional).

Use NRF_PWM_PIN_NOT_CONNECTED if a given output channel is not needed.

uint16_t top_value

Value up to which the pulse generator counter counts.

nrf_pwm_clk_t base_clock

Base clock frequency.

nrf_pwm_mode_t count_mode

Operating mode of the pulse generator counter.

nrf_pwm_dec_load_t load_mode

Mode of loading sequence data from RAM.

nrf_pwm_dec_step_t step_mode

Mode of advancing the active sequence.

bool skip_psel_cfg

Skip pin selection configuration.

When set to true, the driver does not modify pin select registers in the peripheral. Those registers are supposed to be set up externally before the driver is initialized.

Note

When both GPIO configuration and pin selection are to be skipped, the structure fields that specify pins can be omitted, as they are ignored anyway.