nxp,dcnano-lcdif

Vendor: NXP Semiconductors

Description

NXP DCNano LCDIF (LCD Interface) controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clk-div

int

Clock divider for LCDIF. This should be used to set the pixel clock
based on the root clock provided to the module.
The clock should follow the following formula:
(display height + VSYNC pulse width + vertical front porch + vertical back porch) *
(display width + HSYNC pulse width + horizontal front porch + horizontal back porch) *
frame rate

This property is required.

backlight-gpios

phandle-array

LCB backlight control gpio. Driver will initialize this GPIO to active high

This property is required.

hsync

int

HSYNC pulse width in display clock cycles

This property is required.

hfp

int

Horizontal front porch in display clock cycles

This property is required.

hbp

int

Horizontal back porch in display clock cycles

This property is required.

vsync

int

VSYNC pulse width in display clock cycles

This property is required.

vfp

int

Vertical front porch in display clock cycles

This property is required.

vbp

int

Vertical back porch in display clock cycles

This property is required.

data-bus-width

string

LCD data bus width. The default is set to the reset value of 24-bit

Default value: 24-bit

Legal values: '16-bit-config1', '16-bit-config2', '16-bit-config3', '18-bit-config1', '18-bit-config2', '24-bit'

pixel-format

string

Display pixel format.

This property is required.

Legal values: 'unused', 'xrgb-4444', 'xrgb-1555', 'rgb-565', 'xrgb-8888'

polarity

int

OR'ed value of lcdif_polarity_flags, used to control the signal polarity. 0000 VSYNC active low, HSYNC active low, DE active low, Drive data on falling edge. 0001 VSYNC active high, HSYNC active low, DE active low, Drive data on falling edge. 0010 VSYNC active low, HSYNC active high, DE active low, Drive data on falling edge. 0011 VSYNC active high, HSYNC active high, DE active low, Drive data on falling edge. 0100 VSYNC active low, HSYNC active low, DE active high, Drive data on falling edge. 0101 VSYNC active high, HSYNC active low, DE active high, Drive data on falling edge. 0110 VSYNC active low, HSYNC active high, DE active high, Drive data on falling edge. 0111 VSYNC active high, HSYNC active high, DE active high, Drive data on falling edge. 1000 VSYNC active low, HSYNC active low, DE active low, Drive data on rising edge. 1001 VSYNC active high, HSYNC active low, DE active low, Drive data on rising edge. 1010 VSYNC active low, HSYNC active high, DE active low, Drive data on rising edge. 1011 VSYNC active high, HSYNC active high, DE active low, Drive data on rising edge. 1100 VSYNC active low, HSYNC active low, DE active high, Drive data on rising edge. 1101 VSYNC active high, HSYNC active low, DE active high, Drive data on rising edge. 1110 VSYNC active low, HSYNC active high, DE active high, Drive data on rising edge. 1111 VSYNC active high, HSYNC active high, DE active high, Drive data on rising edge.

This property is required.

Legal values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15

height

int

Height of the panel driven by the controller, with the units in pixels.

This property is required.

width

int

Width of the panel driven by the controller, with the units in pixels.

This property is required.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.