st,stm32-dmamux

Description

These nodes are “dmamux” bus nodes.

STM32 DMAMUX controller

The STM32 DMAMUX is a direct memory access multiplexer
capable of supporting independent DMA channels.
DMAMUX clients connected to the STM32 DMA ultiplexer must use a two-cell specifier
for each dmamux channel: a phandle to the DMA multiplexer plus the following 2 integer cells:
  1. channel: the mux channel from 0 to <dma-channels> - 1
  2. slot: the request line Multiplexer ID
  3. channel-config: A 32bit mask specifying the DMA channel configuration
  which is device dependent:
      -bit 6-7 : Direction  (see dma.h)
             0x0: MEM to MEM
             0x1: MEM to PERIPH
             0x2: PERIPH to MEM
             0x3: reserved for PERIPH to PERIPH
      -bit 9 : Peripheral Increment Address
             0x0: no address increment between transfers
             0x1: increment address between transfers
      -bit 10 : Memory Increment Address
             0x0: no address increment between transfers
             0x1: increment address between transfers
      -bit 11-12 : Peripheral data size
             0x0: Byte (8 bits)
             0x1: Half-word (16 bits)
             0x2: Word (32 bits)
             0x3: reserved
      -bit 13-14 : Memory data size
             0x0: Byte (8 bits)
             0x1: Half-word (16 bits)
             0x2: Word (32 bits)
             0x3: reserved
      -bit 15: Peripheral Increment Offset Size not USED for DMA V2
             0x0: offset size is linked to the peripheral bus width
             0x1: offset size is fixed to 4 (32-bit alignment)
      -bit 16-17 : Priority level
             0x0: low
             0x1: medium
             0x2: high
             0x3: very high
 exemple for stm32wb55x
   dmamux1: dmamux@40020800 {
       compatible = "st,stm32-dmamux";
       ...
       dma-channels = <14>;
       dma-generators = <4>;
       dma-requests= <36>;
       status = "disabled";
       label = "DMAMUX_1";
      };
  for client SPI of stm32wb55x
   spi1: spi@40013000 {
       compatible = "st,stm32-spi";
       dmas = <&dmamux1 11 7 0x20440
                &dmamux1 1 6 0x20480>;
       dma-names = "tx", "rx";
      };

Properties

Properties not inherited from the base binding file.

Name	Type	Details
`#dma-cells`	`int`	Number of items to expect in a DMA specifier (see dma V2) This property is required. Constant value: `3`
`dma-channels`	`int`	Number of DMAMUX output request channels supported by the controller This property is required.
`dma-generators`	`int`	Number of DMAMUX Request generator supported by the controller
`dma-requests`	`int`	Number of DMAMUX Peripheral Request Line inputs supported by the controller This is not directly the value to program in the DMAREQ_ID of the DMAMUX_CxCR This property is required.

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-dmamux” compatible.

Name	Type	Details
`reg`	`array`	register space This property is required. See Important properties for more information.
`interrupts`	`array`	interrupts for device This property is required. See Important properties for more information.
`label`	`string`	Human readable string describing the device (used as device_get_binding() argument) This property is required. See Important properties for more information.
`status`	`string`	indicates the operational status of a device Legal values: `'ok'`, `'okay'`, `'disabled'`, `'reserved'`, `'fail'`, `'fail-sss'` See Important properties for more information.
`compatible`	`string-array`	compatible strings This property is required. See Important properties for more information.
`reg-names`	`string-array`	name of each register space
`interrupts-extended`	`compound`	extended interrupt specifier for device
`interrupt-names`	`string-array`	name of each interrupt
`interrupt-parent`	`phandle`	phandle to interrupt controller node
`clocks`	`phandle-array`	Clock gate information
`clock-names`	`string-array`	name of each clock
`#address-cells`	`int`	number of address cells in reg property
`#size-cells`	`int`	number of size cells in reg property
`dmas`	`phandle-array`	DMA channels specifiers
`dma-names`	`string-array`	Provided names of DMA channel specifiers
`io-channels`	`phandle-array`	IO channels specifiers
`io-channel-names`	`string-array`	Provided names of IO channel specifiers
`mboxes`	`phandle-array`	mailbox / IPM channels specifiers
`mbox-names`	`string-array`	Provided names of mailbox / IPM channel specifiers
`wakeup-source`	`boolean`	Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary.
`power-domain`	`phandle`	Power domain the device belongs to. The device will be notified when the power domain it belongs to is either suspended or resumed.

Specifier cell names

dma cells: channel, slot, channel-config