zephyr,spi-bitbang

Vendor: Zephyr-specific binding

Description

These nodes are “spi” bus nodes.

Zephyr SPI Bitbang driver

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clk-gpios

phandle-array

 
Clock gpio info

This property is required.

mosi-gpios

phandle-array

 
MOSI gpio info. Output pin for Master Out Slave In.
If this is not provided then the driver will transmit 0s

miso-gpios

phandle-array

 
MISO gpio info. Input pin for Master In Slave Out.
If this is not provided the driver will read 0s

clock-frequency

int

 
Clock frequency the SPI peripheral is being driven at, in Hz.

cs-gpios

phandle-array

 
An array of chip select GPIOs to use. Each element
in the array specifies a GPIO. The index in the array
corresponds to the child node that the CS gpio controls.

Example:

  spi@... {
          cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
                        <&gpio1 10 GPIO_ACTIVE_LOW>,
                        ...;

          spi-device@0 {
                  reg = <0>;
                  ...
          };
          spi-device@1 {
                  reg = <1>;
                  ...
          };
          ...
  };

The child node "spi-device@0" specifies a SPI device with
chip select controller gpio0, pin 23, and devicetree
GPIO flags GPIO_ACTIVE_LOW. Similarly, "spi-device@1" has CS GPIO
controller gpio1, pin 10, and flags GPIO_ACTIVE_LOW. Additional
devices can be configured in the same way.

If unsure about the flags cell, GPIO_ACTIVE_LOW is generally a safe
choice for a typical "CSn" pin. GPIO_ACTIVE_HIGH may be used if
intervening hardware inverts the signal to the peripheral device or
the line itself is active high.

If this property is not defined, no chip select GPIOs are set.
SPI controllers with dedicated CS pins do not need to define
the cs-gpios property.