SPU HAL

group nrf_spu_hal

Hardware access layer for managing the System Protection Unit (SPU) peripheral.

Enums

enum nrf_spu_event_t

SPU events.

Values:

enumerator NRF_SPU_EVENT_RAMACCERR: A security violation has been detected for the RAM memory space.

enumerator NRF_SPU_EVENT_FLASHACCERR: A security violation has been detected for the Flash memory space.

enumerator NRF_SPU_EVENT_PERIPHACCERR: A security violation has been detected on one or several peripherals.

enum nrf_spu_int_mask_t

SPU interrupts.

Values:

enumerator NRF_SPU_INT_RAMACCERR_MASK: Interrupt on RAMACCERR event.

enumerator NRF_SPU_INT_FLASHACCERR_MASK: Interrupt on FLASHACCERR event.

enumerator NRF_SPU_INT_PERIPHACCERR_MASK: Interrupt on PERIPHACCERR event.

enum nrf_spu_nsc_size_t

SPU Non-Secure Callable (NSC) region size.

Values:

enumerator NRF_SPU_NSC_SIZE_DISABLED: Not defined as a non-secure callable region.

enumerator NRF_SPU_NSC_SIZE_32B: Non-Secure Callable region with a 32-byte size.

enumerator NRF_SPU_NSC_SIZE_64B: Non-Secure Callable region with a 64-byte size.

enumerator NRF_SPU_NSC_SIZE_128B: Non-Secure Callable region with a 128-byte size.

enumerator NRF_SPU_NSC_SIZE_256B: Non-Secure Callable region with a 256-byte size.

enumerator NRF_SPU_NSC_SIZE_512B: Non-Secure Callable region with a 512-byte size.

enumerator NRF_SPU_NSC_SIZE_1024B: Non-Secure Callable region with a 1024-byte size.

enumerator NRF_SPU_NSC_SIZE_2048B: Non-Secure Callable region with a 2048-byte size.

enumerator NRF_SPU_NSC_SIZE_4096B: Non-Secure Callable region with a 4096-byte size.

enum nrf_spu_mem_perm_t

SPU memory region permissions.

Values:

enumerator NRF_SPU_MEM_PERM_EXECUTE: Allow code execution from particular memory region.

enumerator NRF_SPU_MEM_PERM_WRITE: Allow write operation on particular memory region.

enumerator NRF_SPU_MEM_PERM_READ: Allow read operation from particular memory region.

Functions

NRF_STATIC_INLINE void nrf_spu_event_clear(NRF_SPU_Type *p_reg, nrf_spu_event_t event)

Function for clearing a specific SPU event.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to clear.

NRF_STATIC_INLINE bool nrf_spu_event_check(NRF_SPU_Type const *p_reg, nrf_spu_event_t event)

Function for retrieving the state of the SPU event.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to be checked.

Return values

true – The event has been generated.
false – The event has not been generated.

NRF_STATIC_INLINE void nrf_spu_int_enable(NRF_SPU_Type *p_reg, uint32_t mask)

Function for enabling specified interrupts.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Interrupts to be enabled.

NRF_STATIC_INLINE void nrf_spu_int_disable(NRF_SPU_Type *p_reg, uint32_t mask)

Function for disabling specified interrupts.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Interrupts to be disabled.

NRF_STATIC_INLINE uint32_t nrf_spu_int_enable_check(NRF_SPU_Type const *p_reg, uint32_t mask)

Function for checking if the specified interrupts are enabled.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
mask – [in] Mask of interrupts to be checked.

Returns

Mask of enabled interrupts.

NRF_STATIC_INLINE void nrf_spu_publish_set(NRF_SPU_Type *p_reg, nrf_spu_event_t event, uint32_t channel)

Function for setting up publication configuration of a given SPU event.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to configure.
channel – [in] Channel to connect with published event.

NRF_STATIC_INLINE void nrf_spu_publish_clear(NRF_SPU_Type *p_reg, nrf_spu_event_t event)

Function for clearing publication configuration of a given SPU event.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
event – [in] Event to clear.

NRF_STATIC_INLINE bool nrf_spu_tz_is_available(NRF_SPU_Type const *p_reg)

Function for retrieving the capabilities of the current device.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.

Return values

true – ARM TrustZone support is available.
false – ARM TrustZone support is not available.

NRF_STATIC_INLINE void nrf_spu_dppi_config_set(NRF_SPU_Type *p_reg, uint8_t dppi_id, uint32_t channels_mask, bool lock_conf)

Function for configuring the DPPI channels to be available in particular domains.

Channels are configured as bitmask. Set one in bitmask to make channels available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
dppi_id – [in] DPPI peripheral id.
channels_mask – [in] Bitmask with channels configuration.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_gpio_config_set(NRF_SPU_Type *p_reg, uint8_t gpio_port, uint32_t gpio_mask, bool lock_conf)

Function for configuring the GPIO pins to be available in particular domains.

GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only in secure domain. Set zero to make it available in secure and non-secure domains.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
gpio_port – [in] Port number.
gpio_mask – [in] Bitmask with gpio configuration.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_flashnsc_set(NRF_SPU_Type *p_reg, uint8_t flash_nsc_id, nrf_spu_nsc_size_t flash_nsc_size, uint8_t region_number, bool lock_conf)

Function for configuring non-secure callable flash region.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
flash_nsc_id – [in] Non-secure callable flash region ID.
flash_nsc_size – [in] Non-secure callable flash region size.
region_number – [in] Flash region number.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_ramnsc_set(NRF_SPU_Type *p_reg, uint8_t ram_nsc_id, nrf_spu_nsc_size_t ram_nsc_size, uint8_t region_number, bool lock_conf)

Function for configuring non-secure callable RAM region.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
ram_nsc_id – [in] Non-secure callable RAM region ID.
ram_nsc_size – [in] Non-secure callable RAM region size.
region_number – [in] RAM region number.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_flashregion_set(NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)

Function for configuring security for a particular flash region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
region_id – [in] Flash region index.
secure_attr – [in] Set region attribute to secure.
permissions – [in] Flash region permissions.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_ramregion_set(NRF_SPU_Type *p_reg, uint8_t region_id, bool secure_attr, uint32_t permissions, bool lock_conf)

Function for configuring security for the RAM region.

Permissions parameter must be set by using the logical OR on the nrf_spu_mem_perm_t values.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
region_id – [in] RAM region index.
secure_attr – [in] Set region attribute to secure.
permissions – [in] RAM region permissions.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_peripheral_set(NRF_SPU_Type *p_reg, uint32_t peripheral_id, bool secure_attr, bool secure_dma, bool lock_conf)

Function for configuring access permissions of the peripheral.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
peripheral_id – [in] ID number of a particular peripheral.
secure_attr – [in] Peripheral registers accessible only from secure domain.
secure_dma – [in] DMA transfers possible only from RAM memory in secure domain.
lock_conf – [in] Lock configuration until next SoC reset.

NRF_STATIC_INLINE void nrf_spu_extdomain_set(NRF_SPU_Type *p_reg, uint32_t domain_id, bool secure_attr, bool lock_conf)

Function for configuring bus access permissions of the specified external domain.

Parameters

p_reg – [in] Pointer to the structure of registers of the peripheral.
domain_id – [in] ID number of a particular external domain.
secure_attr – [in] Specifies if the bus accesses from this domain have the secure attribute set.
lock_conf – [in] Specifies if the configuration should be locked until next SoC reset.