CONFIG_SPIRAM_CUSTOM_SPIWP_SD3_PIN

Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)

Type: bool

Help

This setting is only used if the SPI flash pins have been overridden by setting the eFuses
SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.

When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
mode, so a WP pin setting is necessary.

If this config item is set to N (default), the correct WP pin will be automatically used for any
Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
to Y and specify the GPIO number connected to the WP pin.

When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
configured in the bootloader.

Help

This setting is only used if the SPI flash pins have been overridden by setting the eFuses
SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.

When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
mode, so a WP pin setting is necessary.

If this config item is set to N (default), the correct WP pin will be automatically used for any
Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
to Y and specify the GPIO number connected to the WP pin.

When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
configured in the bootloader.

Direct dependencies

(ESP_SPIRAM && SOC_ESP32 && <choice: SoC/CPU/Configuration Selection>) || (ESP_SPIRAM && SOC_ESP32 && <choice: SoC/CPU/Configuration Selection>)

(Includes any dependencies from ifs and menus.)

Defaults

Kconfig definitions

At <Zephyr>/soc/xtensa/esp32/Kconfig.soc:172

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:7 → <nRF>/doc/_build/kconfig/Kconfig.soc:1

Menu path: (Top) → SoC/CPU/Configuration Selection → ESP32 → Support for external, SPI-connected RAM → SPI RAM config

config SPIRAM_CUSTOM_SPIWP_SD3_PIN
    bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
    default y if SPIRAM_SPIWP_SD3_PIN != 7
    default n
    depends on ESP_SPIRAM && SOC_ESP32 && <choice>
    help
      This setting is only used if the SPI flash pins have been overridden by setting the eFuses
      SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.

      When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
      ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
      mode, so a WP pin setting is necessary.

      If this config item is set to N (default), the correct WP pin will be automatically used for any
      Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
      to Y and specify the GPIO number connected to the WP pin.

      When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
      configured in the bootloader.

At <Zephyr>/soc/xtensa/esp32/Kconfig.soc:172

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:9

Menu path: (Top) → SoC/CPU/Configuration Selection → ESP32 → Support for external, SPI-connected RAM → SPI RAM config

config SPIRAM_CUSTOM_SPIWP_SD3_PIN
    bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
    default y if SPIRAM_SPIWP_SD3_PIN != 7
    default n
    depends on ESP_SPIRAM && SOC_ESP32 && <choice>
    help
      This setting is only used if the SPI flash pins have been overridden by setting the eFuses
      SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.

      When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
      ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
      mode, so a WP pin setting is necessary.

      If this config item is set to N (default), the correct WP pin will be automatically used for any
      Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
      to Y and specify the GPIO number connected to the WP pin.

      When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
      configured in the bootloader.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)