CONFIG_SECOND_CORE_BOOT_ADDRESS_MCUX

Address the second core will boot at

Type: hex

Help

This is the address the second core will boot from. Additionally this
address is where we will copy the SECOND_IMAGE to. We default this to
the base of SRAM1.

Help

This is the address the second core will boot from.

Help

This is the address the second core will boot from. Additionally this
address is where we will copy the SECOND_IMAGE to. We default this to
the base of SRAM1.

Help

This is the address the second core will boot from.

Direct dependencies

(SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC) || (SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC) || (SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC) || (SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC)

(Includes any dependencies from ifs and menus.)

Defaults

0x20010000
0x0
0x20010000
0x0

Kconfig definitions

At <Zephyr>/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc:54

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:15 → <nRF>/doc/_build/kconfig/Kconfig.soc.arch:2 → <Zephyr>/soc/arm/nxp_lpc/Kconfig:14

Menu path: (Top) → Hardware Configuration → Enable LPC54114 Cortex-M0 second core

config SECOND_CORE_BOOT_ADDRESS_MCUX
    hex "Address the second core will boot at"
    default 0x20010000
    depends on SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC
    help
      This is the address the second core will boot from. Additionally this
      address is where we will copy the SECOND_IMAGE to. We default this to
      the base of SRAM1.

At <Zephyr>/soc/arm/nxp_lpc/lpc55xxx/Kconfig.soc:103

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:15 → <nRF>/doc/_build/kconfig/Kconfig.soc.arch:2 → <Zephyr>/soc/arm/nxp_lpc/Kconfig:14

Menu path: (Top) → Hardware Configuration

config SECOND_CORE_BOOT_ADDRESS_MCUX
    hex "Address the second core will boot at"
    default 0x0
    depends on SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC
    help
      This is the address the second core will boot from.

At <Zephyr>/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc:54

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:18 → <Zephyr>/soc/arm/nxp_lpc/Kconfig:14

Menu path: (Top) → Hardware Configuration → Enable LPC54114 Cortex-M0 second core

config SECOND_CORE_BOOT_ADDRESS_MCUX
    hex "Address the second core will boot at"
    default 0x20010000
    depends on SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC
    help
      This is the address the second core will boot from. Additionally this
      address is where we will copy the SECOND_IMAGE to. We default this to
      the base of SRAM1.

At <Zephyr>/soc/arm/nxp_lpc/lpc55xxx/Kconfig.soc:103

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:38 → <Zephyr>/soc/Kconfig:18 → <Zephyr>/soc/arm/nxp_lpc/Kconfig:14

Menu path: (Top) → Hardware Configuration

config SECOND_CORE_BOOT_ADDRESS_MCUX
    hex "Address the second core will boot at"
    default 0x0
    depends on SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC
    help
      This is the address the second core will boot from.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)