CONFIG_RISCV_SOC_OFFSETS

Enable SOC-based offsets

Type: bool

Help

Enabling this option requires that the SoC provide a soc_offsets.h
header which defines the following macros:

- GEN_SOC_OFFSET_SYMS(): a macro which expands to
  GEN_OFFSET_SYM(soc_esf_t, soc_specific_member) calls
  to ensure offset macros for SOC_ESF_MEMBERS are defined
  in offsets.h. The last one should not end in a semicolon.
  See gen_offset.h for more details.

Direct dependencies

SOC_OPENISA_RV32M1_RISCV32 || SOC_OPENISA_RV32M1_RISCV32 || RISCV

(Includes any dependencies from ifs and menus.)

Defaults

y
y

Symbols that select this symbol

RISCV_SOC_CONTEXT_SAVE

Kconfig definitions

At <Zephyr>/soc/riscv/openisa_rv32m1/Kconfig.defconfig:30

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1

Menu path: (Top)

config RISCV_SOC_OFFSETS
    bool
    default y
    depends on SOC_OPENISA_RV32M1_RISCV32

At <Zephyr>/soc/riscv/openisa_rv32m1/Kconfig.defconfig:30

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27

Menu path: (Top)

config RISCV_SOC_OFFSETS
    bool
    default y
    depends on SOC_OPENISA_RV32M1_RISCV32

At <Zephyr>/arch/riscv/Kconfig:87

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:39 → <Zephyr>/arch/Kconfig:12

Menu path: (Top) → RISCV Options → RISCV Processor Options

config RISCV_SOC_OFFSETS
    bool "Enable SOC-based offsets"
    depends on RISCV
    help
      Enabling this option requires that the SoC provide a soc_offsets.h
      header which defines the following macros:

      - GEN_SOC_OFFSET_SYMS(): a macro which expands to
        GEN_OFFSET_SYM(soc_esf_t, soc_specific_member) calls
        to ensure offset macros for SOC_ESF_MEMBERS are defined
        in offsets.h. The last one should not end in a semicolon.
        See gen_offset.h for more details.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)