CONFIG_RISCV_SOC_MCAUSE_EXCEPTION_MASK

(No prompt – not directly user assignable.)

Type: hex

Help

Specify the bits to use for exception code in mcause register.

Direct dependencies

(SOC_GD32VF103 && SOC_SERIES_GD32VF103) || (SOC_GD32VF103 && SOC_SERIES_GD32VF103) || RISCV

(Includes any dependencies from ifs and menus.)

Defaults

0
0
0x7FFFFFFFFFFFFFFF if 64BIT
0x7FFFFFFF

Kconfig definitions

At <Zephyr>/soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103:18

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:25 → <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6 → <Zephyr>/soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.series:6

Menu path: (Top)

config RISCV_SOC_MCAUSE_EXCEPTION_MASK
    hex
    default 0
    depends on SOC_GD32VF103 && SOC_SERIES_GD32VF103

At <Zephyr>/soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103:18

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:27 → <Zephyr>/soc/riscv/riscv-privilege/Kconfig.defconfig:6 → <Zephyr>/soc/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.series:6

Menu path: (Top)

config RISCV_SOC_MCAUSE_EXCEPTION_MASK
    hex
    default 0
    depends on SOC_GD32VF103 && SOC_SERIES_GD32VF103

At <Zephyr>/arch/riscv/Kconfig:105

Included via <Zephyr>/Kconfig:8 → <Zephyr>/Kconfig.zephyr:39 → <Zephyr>/arch/Kconfig:12

Menu path: (Top) → RISCV Options → RISCV Processor Options

config RISCV_SOC_MCAUSE_EXCEPTION_MASK
    hex
    default 0x7FFFFFFFFFFFFFFF if 64BIT
    default 0x7FFFFFFF
    depends on RISCV
    help
      Specify the bits to use for exception code in mcause register.

(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)