CONFIG_UART_NS16550_WA_ISR_REENABLE_INTERRUPT
Re-enable interrupts by toggling IER at end of ISR
Type: bool
Help
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.
Direct dependencies
(UART_NS16550
&& SOC_SERIES_RISCV32_IT8XXX2
) || (UART_NS16550
&& SOC_SERIES_RISCV32_IT8XXX2
) || (UART_INTERRUPT_DRIVEN
&& UART_NS16550
&& SERIAL
)
(Includes any dependencies from ifs and menus.)
Defaults
y
y
Kconfig definitions
At <Zephyr>/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series:32
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:25
→ <nRF>/doc/_build/kconfig/Kconfig.soc.defconfig:1
→ <Zephyr>/soc/riscv/riscv-ite/Kconfig.defconfig:4
Menu path: (Top)
config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
bool
default y
depends on UART_NS16550 && SOC_SERIES_RISCV32_IT8XXX2
At <Zephyr>/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series:32
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:27
→ <Zephyr>/soc/riscv/riscv-ite/Kconfig.defconfig:4
Menu path: (Top)
config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
bool
default y
depends on UART_NS16550 && SOC_SERIES_RISCV32_IT8XXX2
At <Zephyr>/drivers/serial/Kconfig.ns16550:46
Included via <Zephyr>/Kconfig:8
→ <Zephyr>/Kconfig.zephyr:42
→ <Zephyr>/drivers/Kconfig:26
→ <Zephyr>/drivers/serial/Kconfig:104
Menu path: (Top) → Device Drivers → Serial Drivers → NS16550 serial driver → NS16550 Workarounds
config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
bool "Re-enable interrupts by toggling IER at end of ISR"
depends on UART_INTERRUPT_DRIVEN && UART_NS16550 && SERIAL
help
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)