xlnx,xps-timer-1.00.a-pwm

Vendor: Xilinx

Description

Xilinx AXI Timer IP node (PWM controller)

Properties

Properties not inherited from the base binding file.

Name

Type

Details

xlnx,gen0-assert

int

Active state of the generateout0 signal (0 for active-low, 1 for
active-high).

This property is required.

Legal values: 0, 1

xlnx,gen1-assert

int

Active state of the generateout1 signal (0 for active-low, 1 for
active-high).

This property is required.

Legal values: 0, 1

xlnx,trig0-assert

int

Active state of the capturetrig0 signal (0 for active-low, 1 for
active-high).

This property is required.

Legal values: 0, 1

xlnx,trig1-assert

int

Active state of the capturetrig1 signal (0 for active-low, 1 for
active-high).

This property is required.

Legal values: 0, 1

clock-frequency

int

Clock frequency information for RTC operation

This property is required.

xlnx,count-width

int

Individual timer/counter width in bits.

This property is required.

Legal values: 8, 16, 32

xlnx,one-timer-only

int

0 if both Timer 1 and Timer 2 are enabled, 1 if only Timer 1 is enabled.

This property is required.

Legal values: 0, 1

prescaler

int

RTC frequency equals clock-frequency divided by the prescaler value

#pwm-cells

int

Number of items to expect in a pwm specifier

This property is required.

Specifier cell names

  • pwm cells: channel, period, flags